Searched refs:PLX9052_INTCSR (Results 1 – 5 of 5) sorted by relevance
72 devpriv->lcr_iobase + PLX9052_INTCSR); in pci236_intr_update_cb()80 if (!(inl(devpriv->lcr_iobase + PLX9052_INTCSR) & in pci236_intr_chk_clr_cb()
358 writel(0x00, devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()398 value = readl(devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()401 writel(0x00, devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()413 devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()
27 #define PLX9052_INTCSR 0x4c macro
335 outl(PLX9052_INTCSR_LI2POL, devpriv->plx_regbase + PLX9052_INTCSR); in me4000_xilinx_download()347 val = inl(devpriv->plx_regbase + PLX9052_INTCSR); in me4000_xilinx_download()414 outl(0, devpriv->plx_regbase + PLX9052_INTCSR); in me4000_reset()1149 devpriv->plx_regbase + PLX9052_INTCSR); in me4000_auto_attach()1240 outl(0, devpriv->plx_regbase + PLX9052_INTCSR); in me4000_detach()
147 outb(flags, io_base + PLX9052_INTCSR); in plx9050_interrupt_control()482 intcsr = inb(dev_private->lcr_io_base + PLX9052_INTCSR); in pci9111_interrupt()