Searched refs:PLL_STATUS (Results 1 – 5 of 5) sorted by relevance
| /linux-4.4.14/drivers/video/fbdev/omap2/dss/ |
| D | pll.c | 30 #define PLL_STATUS 0x0004 macro
229 if (wait_for_bit_change(base + PLL_STATUS, 0, 1) != 1) in dss_pll_wait_reset_done()
240 u32 v = readl_relaxed(pll->base + PLL_STATUS); in dss_wait_hsdiv_ack()
312 if (wait_for_bit_change(base + PLL_STATUS, 1, 1) != 1) { in dss_pll_write_config_type_a()
383 if (wait_for_bit_change(base + PLL_STATUS, 1, 1) != 1) { in dss_pll_write_config_type_b()
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| D | dsi.c | 1221 DSI_FLD_GET(PLL_STATUS, 0, 0), in _dsi_print_reset_status()
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| /linux-4.4.14/drivers/phy/ |
| D | phy-ti-pipe3.c | 34 #define PLL_STATUS 0x00000004 macro
171 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); in ti_pipe3_dpll_wait_lock()
245 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); in ti_pipe3_init()
277 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); in ti_pipe3_exit()
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| /linux-4.4.14/arch/mips/ar7/ |
| D | clock.c | 68 #define PLL_STATUS 0x00000001 macro
244 while (readl(&clock->pll) & PLL_STATUS) in tnetd7300_set_clock()
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| /linux-4.4.14/drivers/clk/pistachio/ |
| D | clk-pll.c | 19 #define PLL_STATUS 0x0 macro
93 while (!(pll_readl(pll, PLL_STATUS) & PLL_STATUS_LOCK)) in pll_lock()
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