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Searched refs:PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT (Results 1 – 3 of 3) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_sh_mask.h2042 #define PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 0xf macro
Ddce_11_0_sh_mask.h11398 #define PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 0xf macro
Ddce_10_0_sh_mask.h11588 #define PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 0xf macro