Searched refs:PLL5_CTRL (Results 1 - 1 of 1) sorted by relevance

/linux-4.4.14/drivers/clk/imx/
H A Dclk-vf610.c65 #define PLL5_CTRL (anatop_base + 0xe0) macro
170 clk[VF610_CLK_PLL5_BYPASS_SRC] = imx_clk_mux("pll5_bypass_src", PLL5_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels)); vf610_clocks_init()
178 clk[VF610_CLK_PLL5] = imx_clk_pllv3(IMX_PLLV3_ENET, "pll5", "pll5_bypass_src", PLL5_CTRL, 0x3); vf610_clocks_init()
186 clk[VF610_PLL5_BYPASS] = imx_clk_mux_flags("pll5_bypass", PLL5_CTRL, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); vf610_clocks_init()
203 clk[VF610_CLK_PLL5_ENET] = imx_clk_gate("pll5_enet", "pll5_bypass", PLL5_CTRL, 13); vf610_clocks_init()

Completed in 135 milliseconds