Searched refs:PIPE_CONTROL_QW_WRITE (Results 1 – 3 of 3) sorted by relevance
241 intel_ring_emit(ring, PIPE_CONTROL_QW_WRITE); in intel_emit_post_sync_nonzero_flush()288 flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL; in gen6_render_ring_flush()364 flags |= PIPE_CONTROL_QW_WRITE; in gen7_render_ring_flush()433 flags |= PIPE_CONTROL_QW_WRITE; in gen8_render_ring_flush()1252 PIPE_CONTROL_QW_WRITE | in gen8_rcs_signal()1455 intel_ring_emit(ring__, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE | \1481 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE | in pc_render_add_request()1499 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE | in pc_render_add_request()
1256 PIPE_CONTROL_QW_WRITE)); in gen8_init_indirectctx_bb()1720 flags |= PIPE_CONTROL_QW_WRITE; in gen8_emit_flush_render()
440 #define PIPE_CONTROL_QW_WRITE (1<<14) macro