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Searched refs:PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE (Results 1 – 3 of 3) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/i915/
Dintel_ringbuffer.c280 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen6_render_ring_flush()
355 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen7_render_ring_flush()
428 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen8_render_ring_flush()
Dintel_lrc.c1715 flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE; in gen8_emit_flush_render()
Di915_reg.h445 #define PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE (1<<11) /* MBZ on Ironlake */ macro