Searched refs:PIPESTAT (Results 1 – 5 of 5) sorted by relevance
480 u32 reg = PIPESTAT(pipe); in __i915_enable_pipestat()507 u32 reg = PIPESTAT(pipe); in __i915_disable_pipestat()1659 reg = PIPESTAT(pipe); in valleyview_pipestat_irq_handler()2534 pipe_name(pipe), I915_READ(PIPESTAT(pipe))); in i915_report_and_clear_eir()3151 I915_WRITE(PIPESTAT(pipe), 0xffff); in vlv_display_irq_reset()3475 I915_WRITE(PIPESTAT(pipe), pipestat_mask); in valleyview_display_irqs_install()3476 POSTING_READ(PIPESTAT(PIPE_A)); in valleyview_display_irqs_install()3529 I915_WRITE(PIPESTAT(pipe), pipestat_mask); in valleyview_display_irqs_uninstall()3530 POSTING_READ(PIPESTAT(PIPE_A)); in valleyview_display_irqs_uninstall()3777 I915_WRITE(PIPESTAT(pipe), 0); in i8xx_irq_preinstall()[all …]
102 u32 reg = PIPESTAT(crtc->pipe); in i9xx_check_fifo_underruns()126 u32 reg = PIPESTAT(pipe); in i9xx_set_fifo_underrun_reporting()
790 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()877 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()913 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
4472 #define PIPESTAT(pipe) _PIPE2(pipe, _PIPEASTAT) macro
15723 error->pipe[i].stat = I915_READ(PIPESTAT(i)); in intel_display_capture_error_state()