Searched refs:PIPEACONF (Results 1 - 12 of 12) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/gma500/
H A Doaktrail_device.c208 p->conf = PSB_RVDC32(PIPEACONF); oaktrail_save_display_registers()
287 PSB_WVDC32(0x0, PIPEACONF); oaktrail_save_display_registers()
347 PSB_WVDC32(p->conf, PIPEACONF); oaktrail_restore_display_registers()
468 .conf = PIPEACONF,
H A Dpsb_irq.c77 return PIPEACONF; mid_pipeconf()
629 uint32_t pipeconf_reg = PIPEACONF; psb_get_vblank_counter()
H A Dpsb_device.c267 .conf = PIPEACONF,
H A Dmdfld_device.c452 .conf = PIPEACONF,
H A Dmdfld_intel_display.c278 !((REG_READ(PIPEACONF) | REG_READ(PIPECCONF)) mdfld_disable_crtc()
463 if ((pipe != 1 && !((REG_READ(PIPEACONF) mdfld_crtc_dpms()
935 /* FIXME jliu7 check the DPLL lock bit PIPEACONF[29] */ mdfld_crtc_mode_set()
H A Dcdv_device.c529 .conf = PIPEACONF,
H A Doaktrail_crtc.c565 /* Check the DPLLA lock bit PIPEACONF[29] */ oaktrail_crtc_mode_set()
H A Dmdfld_dsi_dpi.c120 u32 pipeconf_reg = PIPEACONF; dsi_set_pipe_plane_enable_state()
825 u32 pipeconf_reg = PIPEACONF; mdfld_dsi_dpi_mode_set()
H A Doaktrail_hdmi.c278 int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF; oaktrail_crtc_hdmi_mode_set()
H A Dpsb_intel_reg.h491 #define PIPEACONF 0x70008 macro
857 /* #define PIPEACONF 0x70008 */
/linux-4.4.14/drivers/video/fbdev/intelfb/
H A Dintelfbhw.c585 hw->pipe_a_conf = INREG(PIPEACONF); intelfbhw_read_hw_state()
810 printk(" PIPEACONF: 0x%08x\n", hw->pipe_a_conf); intelfbhw_print_hw_state()
1344 pipe_conf_reg = PIPEACONF; intelfbhw_program_mode()
H A Dintelfbhw.h281 #define PIPEACONF 0x70008 macro

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