Searched refs:PE1 (Results 1 - 17 of 17) sorted by relevance
/linux-4.4.14/arch/blackfin/include/mach-common/ |
H A D | ports-e.h | 9 #define PE1 (1 << 1) macro
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/linux-4.4.14/arch/mips/include/asm/txx9/ |
H A D | rbtx4939.h | 71 /* bits for PE1,PE2,PE3 */
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/linux-4.4.14/drivers/scsi/isci/ |
H A D | port_config.c | 154 * -> (PE0), (PE0, PE1), (PE0, PE1, PE2, PE3) LP1 -> (PE1) LP2 -> (PE2), (PE2, 205 * PE0 and PE1 are configured into a 2x1 ports make sure that the sci_port_configuration_agent_validate_ports() 220 * SAS Address for PE1 and PE3 are different since they can not be sci_port_configuration_agent_validate_ports()
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/linux-4.4.14/drivers/pinctrl/ |
H A D | pinctrl-tegra210.c | 229 PINCTRL_PIN(TEGRA_PIN_DMIC1_DAT_PE1, "DMIC1_DAT PE1"), 1376 PINGROUP(pex_l1_rst_n_pa3, PE1, RSVD1, RSVD2, RSVD3, 0x3044, N, N, Y, 0xa64, 12, 5, 20, 5, -1, -1, -1, -1), 1377 PINGROUP(pex_l1_clkreq_n_pa4, PE1, RSVD1, RSVD2, RSVD3, 0x3048, N, N, Y, 0xa60, 12, 5, 20, 5, -1, -1, -1, -1),
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H A D | pinctrl-adi2-bf54x.c | 75 PINCTRL_PIN(65, "PE1"),
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H A D | pinctrl-adi2-bf60x.c | 78 PINCTRL_PIN(65, "PE1"),
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H A D | pinctrl-tegra124.c | 1983 PINGROUP(pex_l1_rst_n_pdd5, PE1, RSVD2, RSVD3, RSVD4, 0x33cc, N, N, N), 1984 PINGROUP(pex_l1_clkreq_n_pdd6, PE1, RSVD2, RSVD3, RSVD4, 0x33d0, N, N, N),
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H A D | pinctrl-tegra20.c | 392 PINCTRL_PIN(TEGRA_PIN_LCD_D1_PE1, "LCD_D1 PE1"),
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H A D | pinctrl-tegra30.c | 331 PINCTRL_PIN(TEGRA_PIN_LCD_D1_PE1, "LCD_D1 PE1"),
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/linux-4.4.14/drivers/pinctrl/sh-pfc/ |
H A D | pfc-shx3.c | 336 PINMUX_GPIO(PE1),
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H A D | pfc-sh7203.c | 781 PINMUX_GPIO(PE1),
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H A D | pfc-sh7785.c | 720 PINMUX_GPIO(PE1),
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H A D | pfc-sh7264.c | 1141 PINMUX_GPIO(PE1),
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H A D | pfc-sh7269.c | 1519 PINMUX_GPIO(PE1),
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/linux-4.4.14/drivers/staging/vt6655/ |
H A D | rf.c | 458 /* PE1: TX_ON, PE2: RX_ON, PE3: PLLON */ s_bAL7230Init()
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/linux-4.4.14/drivers/net/wireless/ |
H A D | adm8211.c | 899 /* Set RF Power control IF pin to PE1+PHYRST# */ adm8211_hw_init_bbp()
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/linux-4.4.14/drivers/net/wireless/rt2x00/ |
H A D | rt2800lib.c | 3353 /* GPIO #4 controls PE0 and PE1, rt2800_config_channel() 3362 /* GPIO #4 controls PE0, PE1 and PE2 */ rt2800_config_channel()
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