Searched refs:PCH_DPLL_SEL (Results 1 – 2 of 2) sorted by relevance
4172 temp = I915_READ(PCH_DPLL_SEL); in ironlake_pch_enable()4179 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_pch_enable()5119 temp = I915_READ(PCH_DPLL_SEL); in ironlake_crtc_disable()5121 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_crtc_disable()9313 tmp = I915_READ(PCH_DPLL_SEL); in ironlake_get_pipe_config()
6192 #define PCH_DPLL_SEL 0xc7000 macro