Searched refs:PAR (Results 1 - 42 of 42) sorted by relevance

/linux-4.4.14/drivers/mtd/maps/
H A Dsc520cdp.c116 ** at 0xFFFEF000. The 16 Programmable Address Region (PAR) registers
122 #define NUM_SC520_PAR 16 /* total number of PAR registers */
125 ** The highest three bits in a PAR register determine what target
126 ** device is controlled by this PAR. Here, only ROMCS? and BOOTCS
136 ** region controlled by the PAR. (We only use non-cacheable)
150 ** Build a value to be written into a PAR register.
192 if(!mmcr) { /* ioremap_nocache failed: skip the PAR reprogramming */ sc520cdp_setup_par()
205 for(j = 0; j < NUM_SC520_PAR; j++) { /* for each PAR register */ sc520cdp_setup_par()
207 /* if target device field matches, reprogram the PAR */ sc520cdp_setup_par()
215 { /* no matching PAR found: try default BIOS address */ sc520cdp_setup_par()
216 printk(KERN_NOTICE "Could not find PAR responsible for %s\n", sc520cdp_setup_par()
233 /* reprogram PAR registers so flash appears at the desired addresses */ init_sc520cdp()
H A Dnettel.c33 * PAR masks and shifts, assuming 64K pages.
294 /* Set PAR to the maximum size */ nettel_init()
299 /* Turn other PAR off so the first probe doesn't find it */ nettel_init()
319 /* Set PAR to the detected size */ nettel_init()
/linux-4.4.14/arch/sh/drivers/pci/
H A Dops-sh5.c27 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); sh5pci_read()
47 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); sh5pci_write()
H A Dops-sh7786.c48 * case the regular PAR/PDR path is sidelined and the mangled sh7786_pcie_config_access()
/linux-4.4.14/drivers/iommu/
H A Dmsm_iommu_hw-8xxx.h140 #define SET_PAR(b, c, v) SET_CTX_REG(PAR, (b), (c), (v))
169 #define GET_PAR(b, c) GET_CTX_REG(PAR, (b), (c))
529 /* PAR */
530 #define SET_FAULT(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT, v)
532 #define SET_FAULT_TF(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_TF, v)
533 #define SET_FAULT_AFF(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_AFF, v)
534 #define SET_FAULT_APF(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_APF, v)
535 #define SET_FAULT_TLBMF(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_TLBMF, v)
537 SET_CONTEXT_FIELD(b, c, PAR, FAULT_HTWDEEF, v)
539 SET_CONTEXT_FIELD(b, c, PAR, FAULT_HTWSEEF, v)
540 #define SET_FAULT_MHF(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_MHF, v)
541 #define SET_FAULT_SL(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_SL, v)
542 #define SET_FAULT_SS(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, FAULT_SS, v)
544 #define SET_NOFAULT_SS(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NOFAULT_SS, v)
545 #define SET_NOFAULT_MT(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NOFAULT_MT, v)
546 #define SET_NOFAULT_SH(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NOFAULT_SH, v)
547 #define SET_NOFAULT_NS(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NOFAULT_NS, v)
548 #define SET_NOFAULT_NOS(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NOFAULT_NOS, v)
549 #define SET_NPFAULT_PA(b, c, v) SET_CONTEXT_FIELD(b, c, PAR, NPFAULT_PA, v)
717 /* PAR */
718 #define GET_FAULT(b, c) GET_CONTEXT_FIELD(b, c, PAR, FAULT)
720 #define GET_FAULT_TF(b, c) GET_CONTEXT_FIELD(b, c, PAR, FAULT_TF)
721 #define GET_FAULT_AFF(b, c) GET_CONTEXT_FIELD(b, c, PAR, FAULT_AFF)
722 #define GET_FAULT_APF(b, c) GET_CONTEXT_FIELD(b, c, PAR, FAULT_APF)
723 #define GET_FAULT_TLBMF(b, c) GET_CONTEXT_FIELD(b, c, PAR, FAULT_TLBMF)
724 #define GET_FAULT_HTWDEEF(b, c) GET_CONTEXT_FIELD(b, c, PAR, FAULT_HTWDEEF)
725 #define GET_FAULT_HTWSEEF(b, c) GET_CONTEXT_FIELD(b, c, PAR, FAULT_HTWSEEF)
726 #define GET_FAULT_MHF(b, c) GET_CONTEXT_FIELD(b, c, PAR, FAULT_MHF)
727 #define GET_FAULT_SL(b, c) GET_CONTEXT_FIELD(b, c, PAR, FAULT_SL)
728 #define GET_FAULT_SS(b, c) GET_CONTEXT_FIELD(b, c, PAR, FAULT_SS)
730 #define GET_NOFAULT_SS(b, c) GET_CONTEXT_FIELD(b, c, PAR, PAR_NOFAULT_SS)
731 #define GET_NOFAULT_MT(b, c) GET_CONTEXT_FIELD(b, c, PAR, PAR_NOFAULT_MT)
732 #define GET_NOFAULT_SH(b, c) GET_CONTEXT_FIELD(b, c, PAR, PAR_NOFAULT_SH)
733 #define GET_NOFAULT_NS(b, c) GET_CONTEXT_FIELD(b, c, PAR, PAR_NOFAULT_NS)
734 #define GET_NOFAULT_NOS(b, c) GET_CONTEXT_FIELD(b, c, PAR, PAR_NOFAULT_NOS)
735 #define GET_NPFAULT_PA(b, c) GET_CONTEXT_FIELD(b, c, PAR, PAR_NPFAULT_PA)
843 #define PAR (0x01C) macro
1084 /* PAR */
1545 /* PAR */
1749 /* PAR */
H A Dmsm_iommu.c592 else /* Upper 20 bits from PAR, lower 12 from VA */ msm_iommu_iova_to_phys()
612 pr_err("FAR = %08x PAR = %08x\n", print_ctx_regs()
H A Dmsm_iommu_dev.c203 pr_err("%s: Invalid PAR value detected\n", iommu_dev->name); msm_iommu_probe()
H A Darm-smmu.c1238 dev_err(dev, "PAR = 0x%llx\n", phys); arm_smmu_iova_to_phys_hard()
/linux-4.4.14/drivers/usb/serial/
H A Dkeyspan_usa28msg.h51 RQSTACK PAR DAT PAR DAT ...
65 DAT PAR DAT PAR DAT PAR ...
/linux-4.4.14/arch/arm/kvm/
H A Dinterrupts.S445 /* Preserve PAR */
446 mrrc p15, 0, r0, r1, c7 @ PAR
452 mrrc p15, 0, r0, r1, c7 @ PAR
459 /* Restore PAR */
461 mcrr p15, 0, r0, r1, c7 @ PAR
470 mcrr p15, 0, r0, r1, c7 @ PAR
H A Dinterrupts_head.S306 mrrc p15, 0, r4, r5, c7 @ PAR
340 mcrr p15, 0, r4, r5, c7 @ PAR
H A Dcoproc.c317 /* PAR swapped by interrupt.S */
/linux-4.4.14/arch/mips/sgi-ip22/
H A Dip22-berr.c61 cpu_err_stat & SGIMC_CSTAT_PAR ? "PAR " : "", print_buserr()
H A Dip28-berr.c261 cpu_err_stat & SGIMC_CSTAT_PAR ? "PAR " : "", print_buserr()
/linux-4.4.14/drivers/net/usb/
H A Dsr9700.h109 #define SR_PAR 0x10 /* 0x10 ~ 0x15 6 bytes for PAR */
H A Dsr9700.c348 * EEPROM automatically to PAR. In case there is no EEPROM externally, sr9700_bind()
349 * a default MAC address is stored in PAR for making chip work properly. sr9700_bind()
/linux-4.4.14/arch/mips/pci/
H A Dpci-vr41xx.h66 #define PAR 0x00000020U macro
/linux-4.4.14/arch/arm64/include/asm/
H A Dkvm_asm.h77 #define c7_PAR_high (c7_PAR + 1) /* PAR top 32 bits */
/linux-4.4.14/arch/arm/include/asm/
H A Dkvm_asm.h41 #define c7_PAR_high 19 /* PAR top 32 bits */
/linux-4.4.14/drivers/net/wireless/
H A Dadm8211.c1092 reg = ADM8211_CSR_READ(PAR); adm8211_hw_init()
1116 ADM8211_CSR_WRITE(PAR, reg); adm8211_hw_init()
1222 tmp = ADM8211_CSR_READ(PAR); adm8211_hw_reset()
1223 ADM8211_CSR_WRITE(PAR, ADM8211_PAR_SWR); adm8211_hw_reset()
1225 while ((ADM8211_CSR_READ(PAR) & ADM8211_PAR_SWR) && timeout--) adm8211_hw_reset()
1231 ADM8211_CSR_WRITE(PAR, tmp); adm8211_hw_reset()
H A Dadm8211.h15 __le32 PAR; /* 0x00 CSR0 */ member in struct:adm8211_csr
85 /* CSR0 - PAR (PCI Address Register) */
/linux-4.4.14/include/sound/
H A Dak4117.h111 #define AK4117_MPAR (1<<6) /* mask enable for PAR bit */
H A Dak4113.h207 /* mask enable for PAR bit */
H A Dak4114.h129 #define AK4117_MPR (1<<0) /* mask enable for PAR bit */
/linux-4.4.14/sound/core/oss/
H A Dpcm_oss.c147 * Return the minimum value for field PAR.
173 * Return the maximum value for field PAR.
261 * Inside configuration space defined by PARAMS remove from PAR all
322 * Inside configuration space defined by PARAMS remove from PAR all
394 * Inside configuration space defined by PARAMS set PAR to the available value
528 * Inside configuration space defined by PARAMS remove from PAR all
/linux-4.4.14/drivers/parisc/
H A Dsuperio.c58 * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
/linux-4.4.14/drivers/scsi/sym53c8xx_2/
H A Dsym_defs.h268 #define PAR 0x01 /* sta: scsi parity error */ macro
H A Dsym_hipd.c1865 OUTW(np, nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR); sym_start_up()
2302 * The chip will then interrupt with both PAR and MA
2768 * - SCSI parity error + Phase mismatch (PAR|MA)
2772 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
2775 * - Some combinations of STO, PAR, UDC, ...
2849 * PAR and MA interrupts may occur at the same time, sym_interrupt()
2897 * A SCSI parity error (PAR) may be combined with a phase sym_interrupt()
2906 if (sist & PAR) sym_int_par (np, sist); sym_interrupt()
/linux-4.4.14/drivers/scsi/
H A Dncr53c8xx.h790 #define PAR 0x01 /* sta: scsi parity error */ macro
H A Dncr53c8xx.c5315 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR); ncr_init()
5953 ** We try to deal with PAR and SBMC combined with ncr_exception()
5962 if ((sist & PAR) && ncr_int_par (np)) ncr_exception()
5975 if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) { ncr_exception()
/linux-4.4.14/drivers/net/ethernet/via/
H A Dvia-velocity.h978 volatile u8 PAR[6]; /* 0x00 */ member in struct:mac_regs
H A Dvia-velocity.c1369 writeb(netdev->dev_addr[i], regs->PAR + i); velocity_init_registers()
2835 netdev->dev_addr[i] = readb(&regs->PAR[i]); velocity_probe()
/linux-4.4.14/include/linux/
H A Dfb.h252 * DO NOT MODIFY PAR */
/linux-4.4.14/arch/arm64/kvm/
H A Dhyp.S921 .ascii "HYP panic:\nPS:%08x PC:%016x ESR:%08x\nFAR:%016x HPFAR:%016x PAR:%016x\nVCPU:%p\n\0"
/linux-4.4.14/drivers/tty/serial/jsm/
H A Djsm_neo.c883 jsm_dbg(INTR, &ch->ch_bd->pci_dev, "%s:%d Port: %d. PAR ERR!\n", neo_parse_lsr()
/linux-4.4.14/drivers/video/fbdev/omap2/omapfb/
H A Domapfb-main.c1007 * DO NOT MODIFY PAR */ omapfb_check_var()
/linux-4.4.14/drivers/gpu/drm/i915/
H A Dintel_hdmi.c1314 /* Set user selected PAR to incoming mode's member */ intel_hdmi_compute_config()
H A Dintel_sdvo.c1189 /* Set user selected PAR to incoming mode's member */ intel_sdvo_compute_config()
/linux-4.4.14/drivers/video/fbdev/
H A Datafb.c286 * * DOES NOT MODIFY PAR *
/linux-4.4.14/drivers/edac/
H A Damd64_edac.c723 edac_dbg(1, " PAR/ERR parity: %s\n", debug_dump_dramcfg_low()
/linux-4.4.14/drivers/net/wireless/ath/ath9k/
H A Dar9003_eeprom.c4492 * correct PAR difference between HT40 and HT20/LEGACY ar9003_hw_tx_power_regwrite()
/linux-4.4.14/drivers/char/pcmcia/
H A Dsynclink_cs.c3507 * 04..03 PAR[1..0] Parity (01=odd, 10=even) async_mode()

Completed in 1320 milliseconds