Searched refs:PACKET3_SET_CONTEXT_REG_START (Results 1 – 11 of 11) sorted by relevance
343 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
458 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
2870 amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_cp_gfx_start()2878 amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_cp_gfx_start()4595 buffer[count++] = cpu_to_le32(ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_get_csb_buffer()4605 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_get_csb_buffer()
3248 ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_cp_gfx_start()3256 amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_cp_gfx_start()
1272 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
1784 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
1931 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
2311 start_reg = (idx_value << 2) + PACKET3_SET_CONTEXT_REG_START; in evergreen_packet3_check()2313 if ((start_reg < PACKET3_SET_CONTEXT_REG_START) || in evergreen_packet3_check()
1667 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
5735 buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in si_get_csb_buffer()
7177 buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in cik_get_csb_buffer()