Searched refs:PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (Results 1 - 12 of 12) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Dvid.h268 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
H A Dcikd.h383 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
H A Dgfx_v7_0.c2859 amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); gfx_v7_0_cp_gfx_start()
4584 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); gfx_v7_0_get_csb_buffer()
H A Dgfx_v8_0.c3235 amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); gfx_v8_0_cp_gfx_start()
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dnid.h1261 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
H A Dsid.h1774 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
H A Dcikd.h1856 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
H A Devergreend.h1655 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
H A Dni.c1585 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); cayman_cp_start()
H A Dsi.c3594 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); si_cp_start()
5714 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); si_get_csb_buffer()
H A Dcik.c4412 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); cik_cp_gfx_start()
7156 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); cik_get_csb_buffer()
H A Devergreen.c3117 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); evergreen_cp_start()

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