Searched refs:NUM_CHANNELS (Results 1 – 10 of 10) sorted by relevance
38 #define NUM_CHANNELS 15 macro42 u8 channel_set[NUM_CHANNELS];43 u8 channel_cck_power[NUM_CHANNELS]; /*dbm*/44 u8 channel_ofdm_power[NUM_CHANNELS];/*dbm*/
26 enum { CH_RX, CH_TX, NUM_CHANNELS }; enumerator49 bool is_open[NUM_CHANNELS];52 struct most_channel_capability capabilities[NUM_CHANNELS];82 BUG_ON(ch_idx < 0 || ch_idx >= NUM_CHANNELS); in configure_channel()121 BUG_ON(ch_idx < 0 || ch_idx >= NUM_CHANNELS); in enqueue()163 BUG_ON(ch_idx < 0 || ch_idx >= NUM_CHANNELS); in poison_channel()328 for (i = 0; i < NUM_CHANNELS; i++) { in i2c_probe()341 dev->most_iface.num_channels = NUM_CHANNELS; in i2c_probe()400 for (i = 0 ; i < NUM_CHANNELS; i++) in i2c_remove()
57 #define NUM_CHANNELS (NUM_IP22ZILOG * 2) macro966 alloc_one_table(NUM_CHANNELS * sizeof(struct uart_ip22zilog_port)); in ip22zilog_alloc_tables()1074 .nr = NUM_CHANNELS,1089 for (channel = 0; channel < NUM_CHANNELS; channel++) in ip22zilog_prepare()1092 ip22zilog_irq_chain = &ip22zilog_port_table[NUM_CHANNELS - 1]; in ip22zilog_prepare()1094 for (channel = NUM_CHANNELS - 1 ; channel > 0; channel--) in ip22zilog_prepare()1134 for (channel = 0; channel < NUM_CHANNELS; channel++) { in ip22zilog_prepare()1171 for (i = 0; i < NUM_CHANNELS; i++) { in ip22zilog_ports_init()1195 for (i = 0; i < NUM_CHANNELS; i++) { in ip22zilog_exit()
59 for (i = 0; i < NUM_CHANNELS; i++) { in orinoco_wiphy_register()183 if ((channel < 1) || (channel > NUM_CHANNELS) || in orinoco_set_monitor_channel()
21 #define NUM_CHANNELS 14 macro
1189 if ((channel < 1) || (channel > NUM_CHANNELS)) { in orinoco_hw_get_freq()
450 if ((chan < 1) || (chan > NUM_CHANNELS) || in orinoco_ioctl_setfreq()
257 #define NUM_CHANNELS 8 /* 2MC per socket, four chan per MC */ macro317 struct pci_dev *pci_tad[NUM_CHANNELS];322 struct sbridge_channel channel[NUM_CHANNELS];991 for (i = 0; i < NUM_CHANNELS; i++) { in get_dimm_config()1133 for (i = 0; i < NUM_CHANNELS; i++) { in get_memory_layout()1153 for (i = 0; i < NUM_CHANNELS; i++) { in get_memory_layout()2136 first_channel = find_first_bit(&channel_mask, NUM_CHANNELS); in sbridge_mce_output_error()2356 layers[0].size = NUM_CHANNELS; in sbridge_register_mci()
40 #define NUM_CHANNELS 8 macro
64 #define NUM_CHANNELS ARRAY_SIZE(channel_freq) macro327 i < NUM_CHANNELS && chs < IW_MAX_FREQUENCIES; i++) in gelic_wl_get_range()