Searched refs:M_DM_DSCR_BASE_RESET (Results 1 - 2 of 2) sorted by relevance

/linux-4.4.14/arch/mips/include/asm/sibyte/
H A Dsb1250_dma.h412 #define M_DM_DSCR_BASE_RESET _SB_MAKEMASK1(61) /* write register */ macro
/linux-4.4.14/arch/mips/mm/
H A Dpage.c628 __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg); sb1_dma_init()

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