Searched refs:MX6QDL_PAD_EIM_A25__GPIO5_IO02 (Results 1 – 9 of 9) sorted by relevance
24 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x0f0b0 /* WL_RST_N */
385 fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
428 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* user led0 */
79 #define MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x088 0x39c 0x000 0x5 0x0 macro
333 #define MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x134 0x504 0x000 0x5 0x0 macro
305 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */
474 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
449 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */
634 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0