Searched refs:MVEBU_MPPS_PER_REG (Results 1 – 4 of 4) sorted by relevance
176 #define MVEBU_MPPS_PER_REG 8 macro183 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in default_mpp_ctrl_get()184 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in default_mpp_ctrl_get()194 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in default_mpp_ctrl_set()195 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in default_mpp_ctrl_set()
37 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in orion_mpp_ctrl_get()40 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in orion_mpp_ctrl_get()52 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in orion_mpp_ctrl_set()55 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in orion_mpp_ctrl_set()
417 nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); in armada_xp_pinctrl_suspend()431 nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); in armada_xp_pinctrl_resume()493 nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); in armada_xp_pinctrl_probe()
81 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in dove_pmu_mpp_ctrl_get()82 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in dove_pmu_mpp_ctrl_get()98 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in dove_pmu_mpp_ctrl_set()99 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in dove_pmu_mpp_ctrl_set()