Searched refs:MPLL_CNTL_MODE (Results 1 - 9 of 9) sorted by relevance
| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| H A D | rv740d.h | 42 #define MPLL_CNTL_MODE 0x61c macro
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| H A D | rv740_dpm.c | 401 WREG32_P(MPLL_CNTL_MODE, SS_SSEN, ~SS_SSEN); rv740_enable_mclk_spread_spectrum()
403 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_SSEN); rv740_enable_mclk_spread_spectrum()
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| H A D | cypress_dpm.c | 230 WREG32_P(MPLL_CNTL_MODE, SS_SSEN, ~SS_SSEN); cypress_enable_spread_spectrum()
234 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_SSEN); cypress_enable_spread_spectrum()
235 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_DSMODE_EN); cypress_enable_spread_spectrum()
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| H A D | rv770d.h | 114 #define MPLL_CNTL_MODE 0x61c macro
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| H A D | rv770.c | 1153 tmp = RREG32(MPLL_CNTL_MODE); rv770_set_clk_bypass_mode()
1158 WREG32(MPLL_CNTL_MODE, tmp); rv770_set_clk_bypass_mode()
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| H A D | nid.h | 556 #define MPLL_CNTL_MODE 0x61c macro
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| H A D | sid.h | 610 #define MPLL_CNTL_MODE 0x2bb0 macro
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| H A D | evergreend.h | 93 #define MPLL_CNTL_MODE 0x61c macro
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| H A D | si.c | 4006 tmp = RREG32(MPLL_CNTL_MODE); si_set_clk_bypass_mode()
4008 WREG32(MPLL_CNTL_MODE, tmp); si_set_clk_bypass_mode()
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