Searched refs:MMP2_CLK_SDH1 (Results 1 - 8 of 8) sorted by relevance
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
H A D | marvell,mmp2.h | 55 #define MMP2_CLK_SDH1 102 macro
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/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
H A D | marvell,mmp2.h | 55 #define MMP2_CLK_SDH1 102 macro
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/linux-4.4.14/include/dt-bindings/clock/ |
H A D | marvell,mmp2.h | 55 #define MMP2_CLK_SDH1 102 macro
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/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
H A D | marvell,mmp2.h | 55 #define MMP2_CLK_SDH1 102 macro
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/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
H A D | marvell,mmp2.h | 55 #define MMP2_CLK_SDH1 102 macro
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/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
H A D | marvell,mmp2.h | 55 #define MMP2_CLK_SDH1 102 macro
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/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
H A D | marvell,mmp2.h | 55 #define MMP2_CLK_SDH1 102 macro
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/linux-4.4.14/drivers/clk/mmp/ |
H A D | clk-of-mmp2.c | 229 {MMP2_CLK_SDH1, "sdh1_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH1, 0x1b, 0x1b, 0x0, 0, &sdh_lock}, 230 {MMP2_CLK_SDH1, "sdh2_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH2, 0x1b, 0x1b, 0x0, 0, &sdh_lock}, 231 {MMP2_CLK_SDH1, "sdh3_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH3, 0x1b, 0x1b, 0x0, 0, &sdh_lock},
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