Searched refs:MMP2_CLK_PWM1 (Results 1 - 8 of 8) sorted by relevance
| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 40 #define MMP2_CLK_PWM1 70 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 40 #define MMP2_CLK_PWM1 70 macro
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| /linux-4.4.14/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 40 #define MMP2_CLK_PWM1 70 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 40 #define MMP2_CLK_PWM1 70 macro
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| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 40 #define MMP2_CLK_PWM1 70 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 40 #define MMP2_CLK_PWM1 70 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 40 #define MMP2_CLK_PWM1 70 macro
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| /linux-4.4.14/drivers/clk/mmp/ |
| H A D | clk-of-mmp2.c | 164 {MMP2_CLK_PWM1, "pwm1_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM1, 0x7, 0x3, 0x0, 0, &reset_lock},
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