| /linux-4.4.14/drivers/net/ethernet/mellanox/mlxsw/ |
| H A D | pci.h | 97 MLXSW_ITEM32(pci, wqe, c, 0x00, 31, 1);
109 MLXSW_ITEM32(pci, wqe, lp, 0x00, 30, 1);
114 MLXSW_ITEM32(pci, wqe, type, 0x00, 23, 4);
130 MLXSW_ITEM32(pci, cqe, lag, 0x00, 23, 1);
138 MLXSW_ITEM32(pci, cqe, system_port, 0x00, 0, 16);
143 MLXSW_ITEM32(pci, cqe, wqe_counter, 0x04, 16, 16);
150 MLXSW_ITEM32(pci, cqe, byte_count, 0x04, 0, 14);
155 MLXSW_ITEM32(pci, cqe, trap_id, 0x08, 0, 8);
161 MLXSW_ITEM32(pci, cqe, crc, 0x0C, 8, 1);
166 MLXSW_ITEM32(pci, cqe, e, 0x0C, 7, 1);
172 MLXSW_ITEM32(pci, cqe, sr, 0x0C, 6, 1);
177 MLXSW_ITEM32(pci, cqe, dqn, 0x0C, 1, 5);
182 MLXSW_ITEM32(pci, cqe, owner, 0x0C, 0, 1);
187 MLXSW_ITEM32(pci, eqe, event_type, 0x0C, 24, 8);
194 MLXSW_ITEM32(pci, eqe, event_sub_type, 0x0C, 16, 8);
199 MLXSW_ITEM32(pci, eqe, cqn, 0x0C, 8, 7);
204 MLXSW_ITEM32(pci, eqe, owner, 0x0C, 0, 1);
209 MLXSW_ITEM32(pci, eqe, cmd_token, 0x08, 16, 16);
214 MLXSW_ITEM32(pci, eqe, cmd_status, 0x08, 0, 8);
219 MLXSW_ITEM32(pci, eqe, cmd_out_param_h, 0x0C, 0, 32);
224 MLXSW_ITEM32(pci, eqe, cmd_out_param_l, 0x10, 0, 32);
|
| H A D | cmd.h | 234 MLXSW_ITEM32(cmd_mbox, query_fw, fw_pages, 0x00, 16, 16);
239 MLXSW_ITEM32(cmd_mbox, query_fw, fw_rev_major, 0x00, 0, 16);
244 MLXSW_ITEM32(cmd_mbox, query_fw, fw_rev_subminor, 0x04, 16, 16);
249 MLXSW_ITEM32(cmd_mbox, query_fw, fw_rev_minor, 0x04, 0, 16);
254 MLXSW_ITEM32(cmd_mbox, query_fw, core_clk, 0x08, 16, 16);
261 MLXSW_ITEM32(cmd_mbox, query_fw, cmd_interface_rev, 0x08, 0, 16);
266 MLXSW_ITEM32(cmd_mbox, query_fw, dt, 0x0C, 31, 1);
272 MLXSW_ITEM32(cmd_mbox, query_fw, api_version, 0x0C, 0, 16);
277 MLXSW_ITEM32(cmd_mbox, query_fw, fw_hour, 0x10, 24, 8);
282 MLXSW_ITEM32(cmd_mbox, query_fw, fw_minutes, 0x10, 16, 8);
287 MLXSW_ITEM32(cmd_mbox, query_fw, fw_seconds, 0x10, 8, 8);
292 MLXSW_ITEM32(cmd_mbox, query_fw, fw_year, 0x14, 16, 16);
297 MLXSW_ITEM32(cmd_mbox, query_fw, fw_month, 0x14, 8, 8);
302 MLXSW_ITEM32(cmd_mbox, query_fw, fw_day, 0x14, 0, 8);
314 MLXSW_ITEM32(cmd_mbox, query_fw, clr_int_bar, 0x28, 30, 2);
325 MLXSW_ITEM32(cmd_mbox, query_fw, error_buf_size, 0x38, 0, 32);
332 MLXSW_ITEM32(cmd_mbox, query_fw, error_int_bar, 0x3C, 30, 2);
343 MLXSW_ITEM32(cmd_mbox, query_fw, doorbell_page_bar, 0x48, 30, 2);
363 MLXSW_ITEM32(cmd_mbox, boardinfo, intapin, 0x10, 24, 8);
371 MLXSW_ITEM32(cmd_mbox, boardinfo, vsd_vendor_id, 0x1C, 0, 16);
406 MLXSW_ITEM32(cmd_mbox, query_aq_cap, log_max_sdq_sz, 0x00, 24, 8);
411 MLXSW_ITEM32(cmd_mbox, query_aq_cap, max_num_sdqs, 0x00, 0, 8);
416 MLXSW_ITEM32(cmd_mbox, query_aq_cap, log_max_rdq_sz, 0x04, 24, 8);
421 MLXSW_ITEM32(cmd_mbox, query_aq_cap, max_num_rdqs, 0x04, 0, 8);
426 MLXSW_ITEM32(cmd_mbox, query_aq_cap, log_max_cq_sz, 0x08, 24, 8);
431 MLXSW_ITEM32(cmd_mbox, query_aq_cap, max_num_cqs, 0x08, 0, 8);
436 MLXSW_ITEM32(cmd_mbox, query_aq_cap, log_max_eq_sz, 0x0C, 24, 8);
441 MLXSW_ITEM32(cmd_mbox, query_aq_cap, max_num_eqs, 0x0C, 0, 8);
447 MLXSW_ITEM32(cmd_mbox, query_aq_cap, max_sg_sq, 0x10, 8, 8);
453 MLXSW_ITEM32(cmd_mbox, query_aq_cap, max_sg_rq, 0x10, 0, 8);
529 MLXSW_ITEM32(cmd_mbox, config_profile, set_max_vepa_channels, 0x0C, 0, 1);
535 MLXSW_ITEM32(cmd_mbox, config_profile, set_max_lag, 0x0C, 1, 1);
541 MLXSW_ITEM32(cmd_mbox, config_profile, set_max_port_per_lag, 0x0C, 2, 1);
547 MLXSW_ITEM32(cmd_mbox, config_profile, set_max_mid, 0x0C, 3, 1);
553 MLXSW_ITEM32(cmd_mbox, config_profile, set_max_pgt, 0x0C, 4, 1);
559 MLXSW_ITEM32(cmd_mbox, config_profile, set_max_system_port, 0x0C, 5, 1);
565 MLXSW_ITEM32(cmd_mbox, config_profile, set_max_vlan_groups, 0x0C, 6, 1);
571 MLXSW_ITEM32(cmd_mbox, config_profile, set_max_regions, 0x0C, 7, 1);
577 MLXSW_ITEM32(cmd_mbox, config_profile, set_flood_mode, 0x0C, 8, 1);
583 MLXSW_ITEM32(cmd_mbox, config_profile, set_flood_tables, 0x0C, 9, 1);
589 MLXSW_ITEM32(cmd_mbox, config_profile, set_max_ib_mc, 0x0C, 12, 1);
595 MLXSW_ITEM32(cmd_mbox, config_profile, set_max_pkey, 0x0C, 13, 1);
601 MLXSW_ITEM32(cmd_mbox, config_profile,
608 MLXSW_ITEM32(cmd_mbox, config_profile, set_ar_sec, 0x0C, 15, 1);
614 MLXSW_ITEM32(cmd_mbox, config_profile, max_vepa_channels, 0x10, 0, 8);
619 MLXSW_ITEM32(cmd_mbox, config_profile, max_lag, 0x14, 0, 16);
624 MLXSW_ITEM32(cmd_mbox, config_profile, max_port_per_lag, 0x18, 0, 16);
630 MLXSW_ITEM32(cmd_mbox, config_profile, max_mid, 0x1C, 0, 16);
636 MLXSW_ITEM32(cmd_mbox, config_profile, max_pgt, 0x20, 0, 16);
641 MLXSW_ITEM32(cmd_mbox, config_profile, max_system_port, 0x24, 0, 16);
646 MLXSW_ITEM32(cmd_mbox, config_profile, max_vlan_groups, 0x28, 0, 12);
651 MLXSW_ITEM32(cmd_mbox, config_profile, max_regions, 0x2C, 0, 16);
657 MLXSW_ITEM32(cmd_mbox, config_profile, max_flood_tables, 0x30, 16, 4);
664 MLXSW_ITEM32(cmd_mbox, config_profile, max_vid_flood_tables, 0x30, 8, 4);
675 MLXSW_ITEM32(cmd_mbox, config_profile, flood_mode, 0x30, 0, 2);
680 MLXSW_ITEM32(cmd_mbox, config_profile,
686 MLXSW_ITEM32(cmd_mbox, config_profile,
695 MLXSW_ITEM32(cmd_mbox, config_profile, max_fid_flood_tables, 0x38, 24, 4);
700 MLXSW_ITEM32(cmd_mbox, config_profile, fid_flood_table_size, 0x38, 0, 16);
706 MLXSW_ITEM32(cmd_mbox, config_profile, max_ib_mc, 0x40, 0, 15);
711 MLXSW_ITEM32(cmd_mbox, config_profile, max_pkey, 0x44, 0, 15);
721 MLXSW_ITEM32(cmd_mbox, config_profile, ar_sec, 0x4C, 24, 2);
728 MLXSW_ITEM32(cmd_mbox, config_profile, adaptive_routing_group_cap, 0x4C, 0, 16);
734 MLXSW_ITEM32(cmd_mbox, config_profile, arn, 0x50, 31, 1);
821 MLXSW_ITEM32(cmd_mbox, sw2hw_dq, cq, 0x00, 24, 8);
827 MLXSW_ITEM32(cmd_mbox, sw2hw_dq, sdq_tclass, 0x00, 16, 6);
832 MLXSW_ITEM32(cmd_mbox, sw2hw_dq, log2_dq_sz, 0x00, 0, 6);
959 MLXSW_ITEM32(cmd_mbox, sw2hw_cq, cv, 0x00, 28, 4);
964 MLXSW_ITEM32(cmd_mbox, sw2hw_cq, c_eqn, 0x00, 24, 1);
971 MLXSW_ITEM32(cmd_mbox, sw2hw_cq, oi, 0x00, 12, 1);
978 MLXSW_ITEM32(cmd_mbox, sw2hw_cq, st, 0x00, 8, 1);
983 MLXSW_ITEM32(cmd_mbox, sw2hw_cq, log_cq_size, 0x00, 0, 4);
990 MLXSW_ITEM32(cmd_mbox, sw2hw_cq, producer_counter, 0x04, 0, 16);
1053 MLXSW_ITEM32(cmd_mbox, sw2hw_eq, int_msix, 0x00, 24, 1);
1058 MLXSW_ITEM32(cmd_mbox, sw2hw_eq, oi, 0x00, 12, 1);
1067 MLXSW_ITEM32(cmd_mbox, sw2hw_eq, st, 0x00, 8, 2);
1072 MLXSW_ITEM32(cmd_mbox, sw2hw_eq, log_eq_size, 0x00, 0, 4);
1079 MLXSW_ITEM32(cmd_mbox, sw2hw_eq, producer_counter, 0x04, 0, 16);
|
| H A D | reg.h | 74 MLXSW_ITEM32(reg, sgcr, llb, 0x04, 0, 1);
124 MLXSW_ITEM32(reg, sspr, m, 0x00, 31, 1);
131 MLXSW_ITEM32(reg, sspr, local_port, 0x00, 16, 8);
139 MLXSW_ITEM32(reg, sspr, sub_port, 0x00, 8, 8);
149 MLXSW_ITEM32(reg, sspr, system_port, 0x04, 0, 16);
177 MLXSW_ITEM32(reg, sfdat, swid, 0x00, 24, 8);
186 MLXSW_ITEM32(reg, sfdat, age_time, 0x04, 0, 20);
218 MLXSW_ITEM32(reg, sfd, swid, 0x00, 24, 8);
252 MLXSW_ITEM32(reg, sfd, op, 0x04, 30, 2);
261 MLXSW_ITEM32(reg, sfd, record_locator, 0x04, 0, 30);
270 MLXSW_ITEM32(reg, sfd, num_rec, 0x08, 0, 8);
430 MLXSW_ITEM32(reg, sfn, swid, 0x00, 24, 8);
440 MLXSW_ITEM32(reg, sfn, num_rec, 0x04, 0, 8);
524 MLXSW_ITEM32(reg, spms, local_port, 0x00, 16, 8);
571 MLXSW_ITEM32(reg, spvid, local_port, 0x00, 16, 8);
578 MLXSW_ITEM32(reg, spvid, sub_port, 0x00, 8, 8);
584 MLXSW_ITEM32(reg, spvid, pvid, 0x04, 0, 12);
617 MLXSW_ITEM32(reg, spvm, pt, 0x00, 31, 1);
624 MLXSW_ITEM32(reg, spvm, pte, 0x00, 30, 1);
630 MLXSW_ITEM32(reg, spvm, local_port, 0x00, 16, 8);
637 MLXSW_ITEM32(reg, spvm, sub_port, 0x00, 8, 8);
643 MLXSW_ITEM32(reg, spvm, num_rec, 0x00, 0, 8);
726 MLXSW_ITEM32(reg, sfgc, type, 0x00, 0, 4);
738 MLXSW_ITEM32(reg, sfgc, bridge_type, 0x04, 24, 3);
754 MLXSW_ITEM32(reg, sfgc, table_type, 0x04, 16, 3);
761 MLXSW_ITEM32(reg, sfgc, flood_table, 0x04, 0, 6);
767 MLXSW_ITEM32(reg, sfgc, mid, 0x08, 0, 16);
773 MLXSW_ITEM32(reg, sfgc, counter_set_type, 0x0C, 24, 8);
779 MLXSW_ITEM32(reg, sfgc, counter_index, 0x0C, 0, 24);
812 MLXSW_ITEM32(reg, sftr, swid, 0x00, 24, 8);
819 MLXSW_ITEM32(reg, sftr, flood_table, 0x00, 16, 6);
826 MLXSW_ITEM32(reg, sftr, index, 0x00, 0, 16);
832 MLXSW_ITEM32(reg, sftr, table_type, 0x04, 16, 3);
838 MLXSW_ITEM32(reg, sftr, range, 0x04, 0, 16);
884 MLXSW_ITEM32(reg, spmlr, local_port, 0x00, 16, 8);
891 MLXSW_ITEM32(reg, spmlr, sub_port, 0x00, 8, 8);
910 MLXSW_ITEM32(reg, spmlr, learn_mode, 0x04, 30, 2);
938 MLXSW_ITEM32(reg, svfa, swid, 0x00, 24, 8);
946 MLXSW_ITEM32(reg, svfa, local_port, 0x00, 16, 8);
961 MLXSW_ITEM32(reg, svfa, mapping_table, 0x00, 8, 3);
970 MLXSW_ITEM32(reg, svfa, v, 0x00, 0, 1);
976 MLXSW_ITEM32(reg, svfa, fid, 0x04, 16, 16);
982 MLXSW_ITEM32(reg, svfa, vid, 0x04, 0, 12);
990 MLXSW_ITEM32(reg, svfa, counter_set_type, 0x08, 24, 8);
998 MLXSW_ITEM32(reg, svfa, counter_index, 0x08, 0, 24);
1032 MLXSW_ITEM32(reg, svpe, local_port, 0x00, 16, 8);
1040 MLXSW_ITEM32(reg, svpe, vp_en, 0x00, 8, 1);
1073 MLXSW_ITEM32(reg, sfmr, op, 0x00, 24, 4);
1079 MLXSW_ITEM32(reg, sfmr, fid, 0x00, 0, 16);
1087 MLXSW_ITEM32(reg, sfmr, fid_offset, 0x08, 0, 16);
1096 MLXSW_ITEM32(reg, sfmr, vtfp, 0x0C, 31, 1);
1104 MLXSW_ITEM32(reg, sfmr, nve_tunnel_flood_ptr, 0x0C, 0, 24);
1113 MLXSW_ITEM32(reg, sfmr, vv, 0x10, 31, 1);
1121 MLXSW_ITEM32(reg, sfmr, vni, 0x10, 0, 24);
1158 MLXSW_ITEM32(reg, spvmlr, local_port, 0x00, 16, 8);
1164 MLXSW_ITEM32(reg, spvmlr, num_rec, 0x00, 0, 8);
1217 MLXSW_ITEM32(reg, pmlp, rxtx, 0x00, 31, 1);
1223 MLXSW_ITEM32(reg, pmlp, local_port, 0x00, 16, 8);
1232 MLXSW_ITEM32(reg, pmlp, width, 0x00, 0, 8);
1275 MLXSW_ITEM32(reg, pmtu, local_port, 0x00, 16, 8);
1284 MLXSW_ITEM32(reg, pmtu, max_mtu, 0x04, 16, 16);
1292 MLXSW_ITEM32(reg, pmtu, admin_mtu, 0x08, 16, 16);
1301 MLXSW_ITEM32(reg, pmtu, oper_mtu, 0x0C, 16, 16);
1332 MLXSW_ITEM32(reg, ptys, local_port, 0x00, 16, 8);
1343 MLXSW_ITEM32(reg, ptys, proto_mask, 0x00, 0, 3);
1377 MLXSW_ITEM32(reg, ptys, eth_proto_cap, 0x0C, 0, 32);
1383 MLXSW_ITEM32(reg, ptys, eth_proto_admin, 0x18, 0, 32);
1389 MLXSW_ITEM32(reg, ptys, eth_proto_oper, 0x24, 0, 32);
1430 MLXSW_ITEM32(reg, ppad, single_base_mac, 0x00, 28, 1);
1436 MLXSW_ITEM32(reg, ppad, local_port, 0x00, 16, 8);
1472 MLXSW_ITEM32(reg, paos, swid, 0x00, 24, 8);
1478 MLXSW_ITEM32(reg, paos, local_port, 0x00, 16, 8);
1489 MLXSW_ITEM32(reg, paos, admin_status, 0x00, 8, 4);
1499 MLXSW_ITEM32(reg, paos, oper_status, 0x00, 0, 4);
1505 MLXSW_ITEM32(reg, paos, ase, 0x04, 31, 1);
1512 MLXSW_ITEM32(reg, paos, ee, 0x04, 30, 1);
1521 MLXSW_ITEM32(reg, paos, e, 0x04, 0, 2);
1557 MLXSW_ITEM32(reg, ppcnt, swid, 0x00, 24, 8);
1565 MLXSW_ITEM32(reg, ppcnt, local_port, 0x00, 16, 8);
1573 MLXSW_ITEM32(reg, ppcnt, pnat, 0x00, 14, 2);
1590 MLXSW_ITEM32(reg, ppcnt, grp, 0x00, 0, 6);
1598 MLXSW_ITEM32(reg, ppcnt, clr, 0x04, 31, 1);
1608 MLXSW_ITEM32(reg, ppcnt, prio_tc, 0x04, 0, 5);
1752 MLXSW_ITEM32(reg, pbmc, local_port, 0x00, 16, 8);
1759 MLXSW_ITEM32(reg, pbmc, xoff_timer_value, 0x04, 16, 16);
1767 MLXSW_ITEM32(reg, pbmc, xoff_refresh, 0x04, 0, 16);
1828 MLXSW_ITEM32(reg, pspa, swid, 0x00, 24, 8);
1834 MLXSW_ITEM32(reg, pspa, local_port, 0x00, 16, 8);
1841 MLXSW_ITEM32(reg, pspa, sub_port, 0x00, 8, 8);
1867 MLXSW_ITEM32(reg, htgt, swid, 0x00, 24, 8);
1875 MLXSW_ITEM32(reg, htgt, type, 0x00, 8, 4);
1889 MLXSW_ITEM32(reg, htgt, trap_group, 0x00, 0, 8);
1900 MLXSW_ITEM32(reg, htgt, pide, 0x04, 15, 1);
1906 MLXSW_ITEM32(reg, htgt, pid, 0x04, 0, 8);
1919 MLXSW_ITEM32(reg, htgt, mirror_action, 0x08, 8, 2);
1925 MLXSW_ITEM32(reg, htgt, mirroring_agent, 0x08, 0, 3);
1938 MLXSW_ITEM32(reg, htgt, priority, 0x0C, 0, 4);
1944 MLXSW_ITEM32(reg, htgt, local_path_cpu_tclass, 0x10, 16, 6);
1954 MLXSW_ITEM32(reg, htgt, local_path_rdq, 0x10, 0, 6);
2013 MLXSW_ITEM32(reg, hpkt, ack, 0x00, 24, 1);
2037 MLXSW_ITEM32(reg, hpkt, action, 0x00, 20, 3);
2043 MLXSW_ITEM32(reg, hpkt, trap_group, 0x00, 12, 6);
2052 MLXSW_ITEM32(reg, hpkt, trap_id, 0x00, 0, 9);
2067 MLXSW_ITEM32(reg, hpkt, ctrl, 0x04, 16, 2);
2111 MLXSW_ITEM32(reg, sbpr, dir, 0x00, 24, 2);
2117 MLXSW_ITEM32(reg, sbpr, pool, 0x00, 0, 4);
2123 MLXSW_ITEM32(reg, sbpr, size, 0x04, 0, 24);
2134 MLXSW_ITEM32(reg, sbpr, mode, 0x08, 0, 4);
2167 MLXSW_ITEM32(reg, sbcm, local_port, 0x00, 16, 8);
2177 MLXSW_ITEM32(reg, sbcm, pg_buff, 0x00, 8, 6);
2188 MLXSW_ITEM32(reg, sbcm, dir, 0x00, 0, 2);
2194 MLXSW_ITEM32(reg, sbcm, min_buff, 0x18, 0, 24);
2207 MLXSW_ITEM32(reg, sbcm, max_buff, 0x1C, 0, 24);
2213 MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4);
2248 MLXSW_ITEM32(reg, sbpm, local_port, 0x00, 16, 8);
2254 MLXSW_ITEM32(reg, sbpm, pool, 0x00, 8, 4);
2265 MLXSW_ITEM32(reg, sbpm, dir, 0x00, 0, 2);
2271 MLXSW_ITEM32(reg, sbpm, min_buff, 0x18, 0, 24);
2284 MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24);
2316 MLXSW_ITEM32(reg, sbmm, prio, 0x00, 8, 4);
2322 MLXSW_ITEM32(reg, sbmm, min_buff, 0x18, 0, 24);
2335 MLXSW_ITEM32(reg, sbmm, max_buff, 0x1C, 0, 24);
2341 MLXSW_ITEM32(reg, sbmm, pool, 0x24, 0, 4);
2431 MLXSW_ITEM32(reg, pude, swid, 0x00, 24, 8);
2437 MLXSW_ITEM32(reg, pude, local_port, 0x00, 16, 8);
2448 MLXSW_ITEM32(reg, pude, admin_status, 0x00, 8, 4);
2458 MLXSW_ITEM32(reg, pude, oper_status, 0x00, 0, 4);
|
| H A D | core.c | 144 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
150 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
156 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
162 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
168 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
176 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
193 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
198 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
203 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
212 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
217 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
228 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
233 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
239 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
245 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
|
| H A D | switchx2.c | 87 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
94 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
99 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
106 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 18, 3);
111 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
121 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
126 MLXSW_ITEM32(tx, hdr, ctclass3, 0x04, 14, 1);
132 MLXSW_ITEM32(tx, hdr, rdq, 0x04, 9, 5);
137 MLXSW_ITEM32(tx, hdr, cpu_sig, 0x04, 0, 9);
142 MLXSW_ITEM32(tx, hdr, sig, 0x0C, 16, 16);
147 MLXSW_ITEM32(tx, hdr, stclass, 0x0C, 13, 3);
152 MLXSW_ITEM32(tx, hdr, emad, 0x0C, 5, 1);
158 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
|
| H A D | spectrum.c | 68 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
75 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
80 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
85 MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
91 MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
96 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
102 MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
107 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
117 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
124 MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
130 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
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| H A D | item.h | 291 #define MLXSW_ITEM32(_type, _cname, _iname, _offset, _shift, _sizebits) \ macro
|