Searched refs:MIPS_CPU_RIXI (Results 1 – 3 of 3) sorted by relevance
374 #define MIPS_CPU_RIXI 0x00800000ull /* CPU has TLB Read/eXec Inhibit */ macro
134 #define cpu_has_rixi (cpu_data[0].options & MIPS_CPU_RIXI)
515 c->options |= MIPS_CPU_RIXI; in decode_config3()518 c->options |= MIPS_CPU_RIXI; in decode_config3()