Searched refs:MIPSInst_SIMM (Results 1 – 3 of 3) sorted by relevance
84 (s32)MIPSInst_SIMM(ir); in mipsr6_emul()93 (s64)MIPSInst_SIMM(ir); in mipsr6_emul()943 if ((long)regs->regs[rs] >= MIPSInst_SIMM(inst)) in mipsr2_decoder()957 if ((long)regs->regs[rs] < MIPSInst_SIMM(inst)) in mipsr2_decoder()971 if (regs->regs[rs] == MIPSInst_SIMM(inst)) in mipsr2_decoder()978 if (regs->regs[rs] != MIPSInst_SIMM(inst)) in mipsr2_decoder()1201 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst); in mipsr2_decoder()1274 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst); in mipsr2_decoder()1348 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst); in mipsr2_decoder()1418 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst); in mipsr2_decoder()[all …]
35 #define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff))) macro
1053 MIPSInst_SIMM(ir)); in cop1Emulate()1071 MIPSInst_SIMM(ir)); in cop1Emulate()1088 MIPSInst_SIMM(ir)); in cop1Emulate()1105 MIPSInst_SIMM(ir)); in cop1Emulate()1246 contpc = MIPSInst_SIMM(ir); in cop1Emulate()