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Searched refs:MDMA_S0_CONFIG (Results 1 – 14 of 14) sorted by relevance

/linux-4.4.14/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h340 #define MDMA_S0_CONFIG 0xFFC00E48 /* MemDMA Stream 0 Source Configuration Register */ macro
DcdefBF532.h438 #define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
439 #define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG,val)
/linux-4.4.14/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h405 #define MDMA_S0_CONFIG 0xFFC00F48 /* MemDMA Stream 0 Source Configuration Register */ macro
DcdefBF512.h728 #define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
729 #define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG, val)
/linux-4.4.14/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h405 #define MDMA_S0_CONFIG 0xFFC00F48 /* MemDMA Stream 0 Source Configuration Register */ macro
DcdefBF522.h745 #define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
746 #define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG, val)
/linux-4.4.14/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h496 #define MDMA_S0_CONFIG 0xFFC01F48 /*MemDMA1 Stream 0 Source Configuration */ macro
DcdefBF561.h1284 #define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
1285 #define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG,val)
/linux-4.4.14/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h381 #define MDMA_S0_CONFIG 0xFFC00F48 /* MemDMA Stream 0 Source Configuration Register … macro
DcdefBF534.h707 #define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
708 #define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG,val)
/linux-4.4.14/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h326 #define MDMA_S0_CONFIG 0xFFC00E48 /* MemDMA0 Stream 0 Source Configuration Register */ macro
DcdefBF538.h1040 #define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
1041 #define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG, val)
/linux-4.4.14/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h414 #define MDMA_S0_CONFIG 0xffc00f48 /* Memory DMA Stream 0 Source Configuration … macro
DcdefBF54x_base.h687 #define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
688 #define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG, val)