Searched refs:MCLK_PWRMGT_CNTL (Results 1 - 17 of 17) sorted by relevance
| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| H A D | rv740d.h | 66 #define MCLK_PWRMGT_CNTL 0x648 macro
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| H A D | rv6xxd.h | 47 #define MCLK_PWRMGT_CNTL 0x624 macro
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| H A D | rv740_dpm.c | 309 RREG32(MCLK_PWRMGT_CNTL); rv740_read_clock_registers()
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| H A D | r600_dpm.c | 311 WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF); r600_enable_mclk_control()
313 WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF); r600_enable_mclk_control()
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| H A D | rv770_dpm.c | 184 WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF); rv770_start_dpm()
202 WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF); rv770_stop_dpm()
1540 RREG32(MCLK_PWRMGT_CNTL); rv770_read_clock_registers()
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| H A D | rv770d.h | 171 #define MCLK_PWRMGT_CNTL 0x648 macro
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| H A D | rv6xx_dpm.c | 992 WREG32_P(MCLK_PWRMGT_CNTL, USE_DISPLAY_GAP, ~USE_DISPLAY_GAP); rv6xx_enable_display_gap()
994 WREG32_P(MCLK_PWRMGT_CNTL, 0, ~USE_DISPLAY_GAP); rv6xx_enable_display_gap()
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| H A D | cypress_dpm.c | 257 WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF); cypress_enable_mclk_control()
259 WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF); cypress_enable_mclk_control()
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| H A D | nid.h | 613 #define MCLK_PWRMGT_CNTL 0x648 macro
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| H A D | sid.h | 596 #define MCLK_PWRMGT_CNTL 0x2ba0 macro
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| H A D | cikd.h | 723 #define MCLK_PWRMGT_CNTL 0x2ba0 macro
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| H A D | evergreend.h | 151 #define MCLK_PWRMGT_CNTL 0x648 macro
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| H A D | r600d.h | 1325 #define MCLK_PWRMGT_CNTL 0x624 macro
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| H A D | ci_dpm.c | 1857 pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL); ci_read_clock_registers()
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| H A D | ni_dpm.c | 1193 ni_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL); ni_read_clock_registers()
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| H A D | si_dpm.c | 3591 si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL); si_read_clock_registers()
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| /linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
| H A D | ci_dpm.c | 6409 dev_info(adev->dev, " MCLK_PWRMGT_CNTL=0x%08X\n", ci_dpm_print_status()
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