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Searched refs:MCLK (Results 1 – 25 of 25) sorted by relevance

/linux-4.4.14/Documentation/devicetree/bindings/media/
Dpxa-camera.txt12 sensor master clock MCLK
13 - clock-frequency: host interface is driving MCLK, and MCLK rate is this rate
/linux-4.4.14/Documentation/devicetree/bindings/sound/
Dcs42l56.txt20 Frequency = MCLK / 4 * (N+2)
22 MCLK = Where MCLK is the frequency of the mclk signal after the MCLKDIV2 circuit.
Dtas2552.txt17 tas2552 can receive it's reference clock via MCLK, BCLK, IVCLKIN pin or use the
19 reference clock is also selectable: PLL, IVCLKIN, BCLK or MCLK.
Dda7213.txt10 - clocks : phandle and clock specifier for codec MCLK.
Dcs4271.txt24 The CS4271 requires its LRCLK and MCLK to be stable before its RESET
Dtas571x.txt17 - clocks: clock phandle for the MCLK input
Domap-abe-twl6040.txt6 - ti,mclk-freq: MCLK frequency for HPPLL operation
Dnau8825.txt74 - clock-names: should include "mclk" for the MCLK master clock
Dda7219.txt28 - clocks : phandle and clock specifier for codec MCLK.
/linux-4.4.14/drivers/staging/sm750fb/
Dddk750_chip.c149 ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_3); in setMasterClock()
152 ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_4); in setMasterClock()
155 ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_6); in setMasterClock()
158 ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_8); in setMasterClock()
/linux-4.4.14/Documentation/sound/alsa/soc/
Dclocking.txt11 Every audio subsystem is driven by a master clock (sometimes referred to as MCLK
33 BCLK = MCLK / x
/linux-4.4.14/arch/arm/mach-ebsa110/
Dcore.c144 #define MCLK 47894000 macro
149 #define CLKBY7 (MCLK / 7)
/linux-4.4.14/drivers/spi/
Dspi-mpc52xx-psc.c31 #define MCLK 20000000 /* PSC port MClk in hz */ macro
109 ccr |= (MCLK / cs->speed_hz - 1) & 0xFF; in mpc52xx_psc_spi_activate_cs()
111 ccr |= (MCLK / 1000000 - 1) & 0xFF; in mpc52xx_psc_spi_activate_cs()
321 mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK; in mpc52xx_psc_spi_port_config()
/linux-4.4.14/Documentation/devicetree/bindings/mmc/
Dsdhci-msm.txt18 "core" - SDC MMC clock (MCLK) (required)
/linux-4.4.14/arch/arm/mm/
Dproc-sa110.S97 ldr r1, [r1, #0] @ force switch to MCLK
Dproc-sa1100.S112 ldr r1, [r1, #0] @ force switch to MCLK
/linux-4.4.14/drivers/video/fbdev/sis/
Dinit.c2268 SiS_DoCalcDelay(struct SiS_Private *SiS_Pr, unsigned short MCLK, unsigned short VCLK, in SiS_DoCalcDelay() argument
2281 idx1 = longtemp % (MCLK * 16); in SiS_DoCalcDelay()
2282 longtemp /= (MCLK * 16); in SiS_DoCalcDelay()
2289 unsigned short colordepth, unsigned short MCLK) in SiS_CalcDelay() argument
2293 temp2 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0); in SiS_CalcDelay()
2294 temp1 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1); in SiS_CalcDelay()
2306 unsigned short temp, index, VCLK, MCLK, colorth; in SiS_SetCRT1FIFO_300() local
2324 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; in SiS_SetCRT1FIFO_300()
2330 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK) + 1; in SiS_SetCRT1FIFO_300()
Dinit301.c5015 unsigned short VCLK = 0, MCLK, colorth = 0, data2 = 0; in SiS_SetCRT2FIFO_300() local
5062 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; in SiS_SetCRT2FIFO_300()
5068 data2 = temp - ((colorth * VCLK) / MCLK); in SiS_SetCRT2FIFO_300()
5148 temp = data % (MCLK << 4); in SiS_SetCRT2FIFO_300()
5149 data = data / (MCLK << 4); in SiS_SetCRT2FIFO_300()
/linux-4.4.14/drivers/video/fbdev/matrox/
Dmatroxfb_Ti3026.c204 #define TVP3026_XPLLADDR_X(LOOP,MCLK,PIX) (((LOOP)<<4) | ((MCLK)<<2) | (PIX)) argument
/linux-4.4.14/arch/powerpc/boot/dts/fsl/
Dp1022rdk.dts56 /* MCLK source is a stand-alone oscillator */
/linux-4.4.14/drivers/video/fbdev/savage/
Dsavagefb.h211 int MCLK, REFCLK, LCDclk; member
Dsavagefb_driver.c1084 if (par->MCLK <= 0) { in savagefb_decode_var()
1088 common_calc_clock(par->MCLK, 1, 1, 31, 0, 3, 135000, 270000, in savagefb_decode_var()
1935 par->MCLK = ((1431818 * (m+2)) / (n1+2) / (1 << n2) + 50) / 100; in savage_init_hw()
1937 par->MCLK); in savage_init_hw()
/linux-4.4.14/sound/soc/codecs/
DKconfig390 # if MCLK divide-by-1.5 is selected and VD is set to 3.3V. The driver will
391 # not select any sample rates that require MCLK to be divided by 1.5.
/linux-4.4.14/arch/powerpc/boot/dts/
Dmpc8610_hpcd.dts158 /* MCLK source is a stand-alone oscillator */
/linux-4.4.14/drivers/video/fbdev/aty/
Daty128fb.c289 u16 MCLK; member