Searched refs:MASK2 (Results 1 - 6 of 6) sorted by relevance
| /linux-4.4.14/arch/xtensa/lib/ |
| H A D | strnlen_user.S | 31 # define MASK2 0x0000ff00
36 # define MASK2 0x00ff0000
62 movi a7, MASK2 # mask for byte 2
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| H A D | strncpy_user.S | 32 # define MASK2 0x0000ff00
37 # define MASK2 0x00ff0000
67 movi a7, MASK2 # mask for byte 2
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| /linux-4.4.14/drivers/net/irda/ |
| H A D | via-ircc.h | 175 #define MASK2 DMA2+0x14 macro
198 outb(5, MASK2); //Mask channel 5 DisableDmaChannel()
201 outb(6, MASK2); //Mask channel 6 DisableDmaChannel()
204 outb(7, MASK2); //Mask channel 7 DisableDmaChannel()
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| /linux-4.4.14/drivers/power/ |
| H A D | rt9455_charger.c | 66 #define RT9455_REG_MASK2 0x0C /* MASK2 reg address */
97 F_CHMIVRIM, /* MASK2 reg fields */
907 dev_err(dev, "Failed to read MASK2 register\n"); rt9455_irq_handler_check_irq1_register()
970 dev_err(dev, "Failed to read MASK2 register\n"); rt9455_irq_handler_check_irq2_register()
1006 * Update MASK2 value, since CHTERMIM bit is rt9455_irq_handler_check_irq2_register()
1030 /* Update MASK2 value, since CHTERMIM bit is cleared. */ rt9455_irq_handler_check_irq2_register()
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| /linux-4.4.14/arch/x86/crypto/ |
| H A D | aesni-intel_asm.S | 61 MASK2: .octa 0xffffffffffffffff0000000000000000 label
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| /linux-4.4.14/drivers/tty/serial/ |
| H A D | crisv10.c | 1872 /* the bits in the MASK2 register are laid out like this:
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