Searched refs:MACRO_TILE_ASPECT (Results 1 – 12 of 12) sorted by relevance
66 #define MACRO_TILE_ASPECT(x) ((x) << GB_MACROTILE_MODE0__MACRO_TILE_ASPECT__SHIFT) macro1519 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()1525 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()1531 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()1537 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v8_0_tiling_mode_table_init()1543 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()1549 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()1555 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()1561 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v8_0_tiling_mode_table_init()1567 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v8_0_tiling_mode_table_init()[all …]
1207 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v7_0_tiling_mode_table_init()1213 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v7_0_tiling_mode_table_init()1219 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v7_0_tiling_mode_table_init()1225 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v7_0_tiling_mode_table_init()1231 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v7_0_tiling_mode_table_init()1237 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v7_0_tiling_mode_table_init()1243 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()1249 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v7_0_tiling_mode_table_init()1255 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v7_0_tiling_mode_table_init()1261 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v7_0_tiling_mode_table_init()[all …]
193 # define MACRO_TILE_ASPECT(x) ((x) << 4) macro
2109 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v8_0_crtc_do_set_base()
2167 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v11_0_crtc_do_set_base()
2179 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v10_0_crtc_do_set_base()
2473 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()2483 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()2493 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()2503 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()2513 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()2523 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()2533 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1)); in si_tiling_mode_table_init()2543 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()2553 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()2563 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()[all …]
2505 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in cik_tiling_mode_table_init()2511 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in cik_tiling_mode_table_init()2517 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()2523 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()2529 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()2535 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()2541 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()2547 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in cik_tiling_mode_table_init()2553 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in cik_tiling_mode_table_init()2559 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()[all …]
1215 # define MACRO_TILE_ASPECT(x) ((x) << 18) macro
1272 # define MACRO_TILE_ASPECT(x) ((x) << 4) macro
2371 # define MACRO_TILE_ASPECT(x) (((x) & 0x3) << 6) macro
2366 MACRO_TILE_ASPECT(mtaspect) | in evergreen_packet3_check()