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Searched refs:M0 (Results 1 – 10 of 10) sorted by relevance

/linux-4.4.14/arch/xtensa/variants/dc232b/include/variant/
Dtie-asm.h49 rsr \at1, M0 // MAC16 registers
92 wsr \at1, M0 // MAC16 registers
/linux-4.4.14/arch/xtensa/variants/de212/include/variant/
Dtie-asm.h95 rsr.M0 \at1 // MAC16 option
150 wsr.M0 \at1 // MAC16 option
/linux-4.4.14/Documentation/devicetree/bindings/reset/
Dnxp,lpc1850-rgu.txt20 12 ARM Cortex-M0 subsystem core (LPC43xx only)
56 56 ARM Cortex-M0 application core (LPC4370 only)
/linux-4.4.14/arch/blackfin/kernel/cplb-mpu/
DMakefile9 -ffixed-M0 -ffixed-M1 -ffixed-M2 -ffixed-M3 \
/linux-4.4.14/arch/blackfin/kernel/cplb-nompu/
DMakefile9 -ffixed-M0 -ffixed-M1 -ffixed-M2 -ffixed-M3 \
/linux-4.4.14/arch/xtensa/variants/dc233c/include/variant/
Dtie-asm.h104 rsr \at1, M0 // MAC16 option
169 wsr \at1, M0 // MAC16 option
/linux-4.4.14/Documentation/frv/
Datomic-ops.txt88 " ld.p %M0,%1 \n" <-- (2)
99 " cst.p %1,%M0 ,cc3,#1 \n" <-- (4a)
/linux-4.4.14/Documentation/devicetree/bindings/arm/
Dl2cc.txt46 addresses will go to the M0 port.
/linux-4.4.14/arch/arm/mach-omap2/
Dmux34xx.c17 #define _OMAP3_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ argument
19 .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
26 #define _OMAP3_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \ argument
28 .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
34 #define _OMAP3_BALLENTRY(M0, bb, bt) \ argument
36 .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
/linux-4.4.14/arch/arm/
DKconfig336 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"