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Searched refs:IRQ_DMA5 (Results 1 – 4 of 4) sorted by relevance

/linux-4.4.14/arch/arm/mach-sa1100/include/mach/
Dirqs.h36 #define IRQ_DMA5 26 /* DMA controller channel 5 */ macro
/linux-4.4.14/arch/arm/mach-sa1100/
Dgeneric.c290 DEFINE_RES_IRQ(IRQ_DMA5),
/linux-4.4.14/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h613 #define IRQ_DMA5 0x00000080 /* DMA Channel 5 (SPORT1 RX) Interrupt */
/linux-4.4.14/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h614 #define IRQ_DMA5 0x00000080 /* DMA Channel 5 (SPORT1 RX) Interrupt */