Searched refs:INT_SEL (Results 1 – 14 of 14) sorted by relevance
256 #define INT_SEL(x) ((x) << 24) macro
371 #define INT_SEL(x) ((x) << 24) macro
2473 DATA_SEL(1) | INT_SEL(0)); in gfx_v7_0_ring_emit_fence_gfx()2485 DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v7_0_ring_emit_fence_gfx()2512 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v7_0_ring_emit_fence_compute()
4631 DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v8_0_ring_emit_fence_gfx()4779 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v8_0_ring_emit_fence_compute()
102 #define INT_SEL BIT10 macro
2313 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV)); in _nbu2ss_enable_controller()
1254 #define INT_SEL(x) ((x) << 24) macro
1767 #define INT_SEL(x) ((x) << 24) macro
1844 #define INT_SEL(x) ((x) << 24) macro
1679 #define INT_SEL(x) ((x) << 24) macro
1426 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | DATA_SEL(1) | INT_SEL(2)); in cayman_fence_ring_emit()
3978 DATA_SEL(1) | INT_SEL(0)); in cik_fence_gfx_ring_emit()3989 radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | DATA_SEL(1) | INT_SEL(2)); in cik_fence_gfx_ring_emit()4015 radeon_ring_write(ring, DATA_SEL(1) | INT_SEL(2)); in cik_fence_compute_ring_emit()
2886 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | DATA_SEL(1) | INT_SEL(2)); in r600_fence_ring_emit()
3393 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | DATA_SEL(1) | INT_SEL(2)); in si_fence_ring_emit()