Searched refs:INT2PRI1 (Results 1 - 8 of 8) sorted by relevance

/linux-4.4.14/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7763.c322 { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },
H A Dsetup-sh7780.c370 { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },
H A Dsetup-shx3.c298 { 0xfe410804, 0, 32, 4, /* INT2PRI1 */ { DTU3, DTU2, DTU1, DTU0,
H A Dsetup-sh7734.c510 { 0xFF804004, 0, 32, 8, /* INT2PRI1 */
H A Dsetup-sh7770.c442 { 0xffe00004, 0, 32, 8, /* INT2PRI1 */ { IPI, SPDIF, HUDI, I2C } },
H A Dsetup-sh7785.c472 { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, } },
H A Dsetup-sh7757.c1014 #define INT2PRI1 0xffd40004 macro
1067 { INT2PRI1, 0, 32, 8, { TMU3, TMU4, TMU5, SDHI } },
H A Dsetup-sh7786.c626 { 0xfe410804, 0, 32, 8, /* INT2PRI1 */ { TMU0_0, TMU0_1,

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