Searched refs:IMX6QDL_CLK_PLL5_VIDEO_DIV (Results 1 - 8 of 8) sorted by relevance
| /linux-4.4.14/drivers/clk/imx/ |
| H A D | clk-imx6q.c | 275 clk[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock); imx6q_clocks_init()
504 clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); imx6q_clocks_init()
505 clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); imx6q_clocks_init()
512 clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); imx6q_clocks_init()
513 clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); imx6q_clocks_init()
514 clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); imx6q_clocks_init()
515 clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); imx6q_clocks_init()
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| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| H A D | imx6qdl-clock.h | 208 #define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| H A D | imx6qdl-clock.h | 208 #define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 macro
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| /linux-4.4.14/include/dt-bindings/clock/ |
| H A D | imx6qdl-clock.h | 208 #define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| H A D | imx6qdl-clock.h | 208 #define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 macro
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| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| H A D | imx6qdl-clock.h | 208 #define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| H A D | imx6qdl-clock.h | 208 #define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| H A D | imx6qdl-clock.h | 208 #define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 macro
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