Searched refs:HDMI_ACR_32_0 (Results 1 – 5 of 5) sorted by relevance
87 WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz)); in evergreen_hdmi_update_acr()
786 #define HDMI_ACR_32_0 0x74ac macro
641 #define HDMI_ACR_32_0 0x70dc macro
1681 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz); in dce_v11_0_afmt_update_ACR()
1693 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz); in dce_v10_0_afmt_update_ACR()