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Searched refs:GENFC_WT__VSYNC_SEL_W__SHIFT (Results 1 – 3 of 3) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_sh_mask.h10616 #define GENFC_WT__VSYNC_SEL_W__SHIFT 0x3 macro
Ddce_11_0_sh_mask.h10822 #define GENFC_WT__VSYNC_SEL_W__SHIFT 0x3 macro
Ddce_10_0_sh_mask.h11012 #define GENFC_WT__VSYNC_SEL_W__SHIFT 0x3 macro