Searched refs:EXYNOS_DSIM_CLKCTRL (Results 1 - 2 of 2) sorted by relevance

/linux-4.4.14/drivers/video/fbdev/exynos/
H A Dexynos_mipi_dsi_lowlevel.c298 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & exynos_mipi_dsi_enable_pll_bypass()
303 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); exynos_mipi_dsi_enable_pll_bypass()
359 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & exynos_mipi_dsi_set_byte_clock_src()
364 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); exynos_mipi_dsi_set_byte_clock_src()
370 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & exynos_mipi_dsi_enable_byte_clock()
375 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); exynos_mipi_dsi_enable_byte_clock()
381 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & exynos_mipi_dsi_set_esc_clk_prs()
388 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); exynos_mipi_dsi_set_esc_clk_prs()
394 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL); exynos_mipi_dsi_enable_esc_clk_on_lane()
402 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); exynos_mipi_dsi_enable_esc_clk_on_lane()
496 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & exynos_mipi_dsi_enable_hs_clock()
501 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); exynos_mipi_dsi_enable_hs_clock()
H A Dexynos_mipi_dsi_regs.h20 #define EXYNOS_DSIM_CLKCTRL 0x8 /* Clock control register */ macro
60 /* EXYNOS_DSIM_CLKCTRL */

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