Searched refs:EXYNOS_DP_VIDEO_CTL_10 (Results 1 – 2 of 2) sorted by relevance
1167 reg = readl(dp->reg_base + EXYNOS_DP_VIDEO_CTL_10); in exynos_dp_set_video_timing_mode()1169 writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_10); in exynos_dp_set_video_timing_mode()1171 reg = readl(dp->reg_base + EXYNOS_DP_VIDEO_CTL_10); in exynos_dp_set_video_timing_mode()1173 writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_10); in exynos_dp_set_video_timing_mode()1228 reg = readl(dp->reg_base + EXYNOS_DP_VIDEO_CTL_10); in exynos_dp_config_video_slave_mode()1231 writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_10); in exynos_dp_config_video_slave_mode()1233 reg = readl(dp->reg_base + EXYNOS_DP_VIDEO_CTL_10); in exynos_dp_config_video_slave_mode()1236 writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_10); in exynos_dp_config_video_slave_mode()1238 reg = readl(dp->reg_base + EXYNOS_DP_VIDEO_CTL_10); in exynos_dp_config_video_slave_mode()1241 writel(reg, dp->reg_base + EXYNOS_DP_VIDEO_CTL_10); in exynos_dp_config_video_slave_mode()
23 #define EXYNOS_DP_VIDEO_CTL_10 0x44 macro