Searched refs:EXYNOS_DP_PLL_CTL (Results 1 – 2 of 2) sorted by relevance
75 #define EXYNOS_DP_PLL_CTL 0x71C macro
194 reg = readl(dp->reg_base + EXYNOS_DP_PLL_CTL); in exynos_dp_set_pll_power_down()196 writel(reg, dp->reg_base + EXYNOS_DP_PLL_CTL); in exynos_dp_set_pll_power_down()198 reg = readl(dp->reg_base + EXYNOS_DP_PLL_CTL); in exynos_dp_set_pll_power_down()200 writel(reg, dp->reg_base + EXYNOS_DP_PLL_CTL); in exynos_dp_set_pll_power_down()