Searched refs:EXYNOS_DP_INT_CTL (Results 1 – 2 of 2) sorted by relevance
45 #define EXYNOS_DP_INT_CTL 0x3FC macro
90 writel(INT_POL1 | INT_POL0, dp->reg_base + EXYNOS_DP_INT_CTL); in exynos_dp_init_interrupt()