Searched refs:EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG (Results 1 – 2 of 2) sorted by relevance
431 { EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG, { 0x1, 0x0, 0x0} },562 { EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG, { 0x0, 0x0, 0x0} },660 EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG,
449 #define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG 0x14CC macro