Searched refs:EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG (Results 1 – 2 of 2) sorted by relevance
425 { EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG, { 0x1, 0x0, 0x0} },550 { EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG, { 0x0, 0x0, 0x0} },649 EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG,
443 #define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG 0x148C macro