Searched refs:EPPI0_CLKDIV (Results 1 – 5 of 5) sorted by relevance
45 #define EPPI0_CLKDIV 0xffc0101c /* EPPI0 Clock Divide Register */ macro
70 #define EPPI0_CLKDIV 0xffc0101c /* EPPI0 Clock Divide Register */ macro
114 #define bfin_read_EPPI0_CLKDIV() bfin_read16(EPPI0_CLKDIV)115 #define bfin_write_EPPI0_CLKDIV(val) bfin_write16(EPPI0_CLKDIV, val)
67 #define bfin_read_EPPI0_CLKDIV() bfin_read16(EPPI0_CLKDIV)68 #define bfin_write_EPPI0_CLKDIV(val) bfin_write16(EPPI0_CLKDIV, val)
1452 #define EPPI0_CLKDIV 0xFFC1801C /* EPPI0 Clock Divide Register */ macro