Searched refs:EBIU_DDRBWC0 (Results 1 – 3 of 3) sorted by relevance
182 #define EBIU_DDRBWC0 0xffc00a80 /* DDR Bank0 Write Count Register */ macro
265 #define bfin_read_EBIU_DDRBWC0() bfin_read32(EBIU_DDRBWC0)266 #define bfin_write_EBIU_DDRBWC0(val) bfin_write32(EBIU_DDRBWC0, val)
915 D32(EBIU_DDRBWC0); in bfin_debug_mmrs_init()