Searched refs:EBIU_DDRBWC0 (Results 1 - 3 of 3) sorted by relevance

/linux-4.4.14/arch/blackfin/kernel/
H A Ddebug-mmrs.c915 D32(EBIU_DDRBWC0); bfin_debug_mmrs_init()
/linux-4.4.14/arch/blackfin/mach-bf548/include/mach/
H A DcdefBF54x_base.h265 #define bfin_read_EBIU_DDRBWC0() bfin_read32(EBIU_DDRBWC0)
266 #define bfin_write_EBIU_DDRBWC0(val) bfin_write32(EBIU_DDRBWC0, val)
H A DdefBF54x_base.h182 #define EBIU_DDRBWC0 0xffc00a80 /* DDR Bank0 Write Count Register */ macro

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