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Searched refs:DRAM (Results 1 – 51 of 51) sorted by relevance

/linux-4.4.14/arch/cris/boot/compressed/
Dhead_v10.S27 ;; We need to initialze DRAM registers before we start using the DRAM
52 ;; We assume 8 MB is the minimum DRAM in an eLinux
58 ;; in the flash (since we wont try to copy it to DRAM
69 ;; Copy text+data to DRAM
115 move.d RAM_INIT_MAGIC, $r8 ; Tell kernel that DRAM is initialized
DREADME11 burned into a flash or executed directly at the DRAM origin.
20 Be careful - it assumes some things about free locations in DRAM. It
21 assumes the DRAM starts at 0x40000000 and that it is at least 8 MB,
Dhead_v32.S26 ;; Initialize the DRAM registers.
43 ;; We assume 8 MB is the minimum DRAM and put
/linux-4.4.14/sound/isa/gus/
Dgus_dram.c43 outsb(GUSP(gus, DRAM), buffer, size1); in snd_gus_dram_poke()
79 insb(GUSP(gus, DRAM), buffer, size1); in snd_gus_dram_peek()
Dgus_main.c170 gus->gf1.reg_dram = GUSP(gus, DRAM); in snd_gus_create()
Dgus_io.c33 inb(GUSP(gus, DRAM)); in snd_gf1_delay()
Dgus_pcm.c329 outsb(GUSP(gus, DRAM), buf, len); in snd_gf1_pcm_poke_block()
/linux-4.4.14/arch/cris/arch-v32/kernel/
Dhead.S45 ;; 0x40004000 if DRAM.
162 ; Check if starting from DRAM (network->RAM boot or unpacked
184 ;; Initialize DRAM.
199 ;; Copy the text and data section to DRAM. This depends on that the
337 ;; Clear romfs_in_flash flag, as we now know romfs is in DRAM
/linux-4.4.14/arch/arm/
DKconfig-nommu13 hex '(S)DRAM Base Address' if SET_MEM_PARAM
17 hex '(S)DRAM SIZE' if SET_MEM_PARAM
/linux-4.4.14/arch/cris/boot/rescue/
Dhead_v10.S79 ;; of itself (after having setup the DRAM etc).
157 ;; We need to setup the bus registers before we start using the DRAM
304 move.d RAM_INIT_MAGIC, $r8 ; Tell next product that DRAM is
316 move.d RAM_INIT_MAGIC, $r8 ; Tell next product that DRAM is
Dkimagerescue.S66 ;; We need to setup the bus registers before we start using the DRAM
70 ;; We assume 8 MB is the minimum DRAM in an eLinux
/linux-4.4.14/arch/cris/arch-v10/kernel/
Dhead.S31 ;; 0x00000000 if Flash, 0x40004000 if DRAM
43 ;; to 0x40000000 (where the actual DRAM resides) otherwise
146 ;; Check if we start from DRAM or FLASH by testing PC
177 ;; We need to initialze DRAM registers before we start using the DRAM
186 ;; Copy text+data to DRAM
196 ;; DRAM and we never get here in the first place :))
/linux-4.4.14/arch/cris/arch-v10/lib/
Dhw_settings.S33 ; SDRAM or EDO DRAM?
Ddram_init.S78 and.d 0x800000, $r1 ; DRAM width is bit 23
/linux-4.4.14/drivers/memory/tegra/
DKconfig15 Tegra124 chips. The EMC controls the external DRAM on the board.
/linux-4.4.14/arch/arm/mach-lpc32xx/
Dsuspend.S54 @ This guarantees a small windows where DRAM isn't busy
/linux-4.4.14/drivers/idle/
DKconfig25 DRAM devices.
/linux-4.4.14/Documentation/arm/SA1100/
DLART5 applications. It has 32 MB DRAM, 4MB Flash ROM, double RS232 and all
DItsy11 64 Meg of DRAM and 32 Meg of Flash. The initial work includes support for
/linux-4.4.14/drivers/powercap/
DKconfig28 fine grained control. These domains include processor package, DRAM
/linux-4.4.14/Documentation/devicetree/bindings/clock/
Dexynos4415-clock.txt11 - "samsung,exynos4415-cmu-dmc" - for the Exynos4415 SoC DRAM Memory
Dmvebu-core-clock.txt11 3 = hclk (DRAM control clock)
Dexynos5433-clock.txt15 which generates clocks for DRAM Memory Controller domain.
/linux-4.4.14/drivers/edac/
DKconfig102 Support for error detection and correction of DRAM ECC errors on
112 errors into DRAM.
122 which trigger the DRAM ECC Read and Write respectively.
186 E3-1200 based DRAM controllers.
357 tristate "Cavium Octeon DRAM Memory Controller (LMC)"
/linux-4.4.14/arch/c6x/kernel/
Dvectors.S12 ; At RESET the processor sets up the DRAM timing parameters and
/linux-4.4.14/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-pmc.txt29 0 (LP0): CPU + Core voltage off and DRAM in self-refresh
30 1 (LP1): CPU voltage off and DRAM in self-refresh
/linux-4.4.14/arch/cris/arch-v10/
DKconfig267 Waitstates for SRAM, Flash and peripherals (not DRAM). 95f8 is a
290 The R_DRAM_CONFIG register specifies everything on how the DRAM
301 Different DRAM chips have different speeds. Current Axis products
302 use 50ns DRAM chips which can use the timing: 5611.
DREADME.mm58 E0000000|______________________| | DRAM |
73 | kernel seg_0 - seg_a | \==>| DRAM |
144 NOTE: while setting up the MMU, we run in a non-mapped mode in the DRAM (0x40 function
/linux-4.4.14/arch/arm/mach-sa1100/
Dsleep.S133 @ Step 5 clear DRAM refresh control register
/linux-4.4.14/arch/cris/arch-v32/mach-fs/
Ddram_init.S59 and.d 0x200, $r1 ; DRAM width is bit 9
/linux-4.4.14/Documentation/ABI/testing/
Dsysfs-devices-edac101 Description: This attribute file will display what type of DRAM device is
110 mean a Chipkill with x4 DRAM.
/linux-4.4.14/arch/arm/mach-tegra/
Dsleep-tegra20.S392 str r1, [r0, #EMC_SELF_REF] @ take DRAM out of self refresh
500 str r2, [r1, #EMC_REQ_CTRL] @ stall incoming DRAM requests
Dsleep-tegra30.S454 str r1, [r0, #EMC_SELF_REF] @ take DRAM out of self refresh
770 str r1, [r0, #EMC_REQ_CTRL] @ stall incoming DRAM requests
/linux-4.4.14/Documentation/devicetree/bindings/arm/
Dfw-cfg.txt12 DTB that QEMU places at the bottom of the guest's DRAM.
/linux-4.4.14/arch/arm64/boot/dts/freescale/
Dfsl-ls2080a.dtsi125 /* DRAM space - 1, size : 2 GB DRAM */
/linux-4.4.14/Documentation/devicetree/bindings/arm/bcm/
Dbrcm,brcmstb.txt183 Sequencer DRAM parameters and control registers. Used for Self-Refresh
/linux-4.4.14/arch/cris/
DKconfig174 int "DRAM size (dec, in MB)"
177 Size of DRAM (decimal in MB) typically 2, 8 or 16.
/linux-4.4.14/Documentation/cris/
DREADME37 * EDO or page-mode DRAM
/linux-4.4.14/arch/frv/kernel/
Dsleep.S205 # now that DRAM is back, this is the end of the code which gets
/linux-4.4.14/Documentation/acpi/apei/
Deinj.txt174 …0 (channel:0 slot:0 page:0x12345 offset:0x0 grain:32 syndrome:0x0 - area:DRAM err_code:0001:0090 …
/linux-4.4.14/Documentation/blockdev/
DREADME.DAC960163 4MB/8MB EDRAM or 2MB/4MB/8MB/16MB/32MB DRAM Memory
167 4MB/8MB EDRAM or 2MB/4MB/8MB/16MB/32MB DRAM Memory
171 2MB/4MB/8MB/16MB/32MB DRAM Memory
175 2MB/4MB/8MB/16MB/32MB DRAM Memory
/linux-4.4.14/include/video/
Dmach64.h882 #define DRAM 1 macro
/linux-4.4.14/drivers/video/fbdev/aty/
Dmach64_ct.c450 case DRAM: in aty_init_pll_ct()
/linux-4.4.14/Documentation/
Dbus-virt-phys-mapping.txt132 of a video graphics card it can be normal DRAM that is just used for a frame
Dedac.txt273 This attribute file will display what type of DRAM device is
/linux-4.4.14/drivers/mtd/devices/
DKconfig24 bool "PMC551 256M DRAM Bugfix"
/linux-4.4.14/arch/alpha/
DKconfig145 Address, CIA) - a 383 pin plastic PGA). It provides a DRAM
384 2 PCI, one pair are on a shared slot). Supports 36-bit DRAM SIMs.
/linux-4.4.14/Documentation/virtual/kvm/
Dtimekeeping.txt64 |------>| CLOCK OUT | ---------> 66.3 KHZ DRAM
/linux-4.4.14/Documentation/laptops/
Dthinkpad-acpi.txt880 9: MCH (northbridge) to DRAM Bus
/linux-4.4.14/drivers/video/fbdev/
DKconfig1723 prompt "DRAM timing"
/linux-4.4.14/arch/x86/
DKconfig982 the DRAM Error Threshold.