Searched refs:DP_TP_CTL_LINK_TRAIN_PAT1 (Results 1 – 3 of 3) sorted by relevance
648 DP_TP_CTL_LINK_TRAIN_PAT1 | in hsw_fdi_link_train()705 temp |= DP_TP_CTL_LINK_TRAIN_PAT1; in hsw_fdi_link_train()2380 val |= DP_TP_CTL_LINK_TRAIN_PAT1; in intel_ddi_post_disable()3057 val |= DP_TP_CTL_LINK_TRAIN_PAT1; in intel_ddi_prepare_link_retrain()3066 DP_TP_CTL_LINK_TRAIN_PAT1 | DP_TP_CTL_SCRAMBLE_DISABLE; in intel_ddi_prepare_link_retrain()
7227 #define DP_TP_CTL_LINK_TRAIN_PAT1 (0<<8) macro
2485 temp |= DP_TP_CTL_LINK_TRAIN_PAT1; in _intel_dp_set_link_train()