Searched refs:DPLL_CTRL1 (Results 1 – 4 of 4) sorted by relevance
1065 dpll_ctl1 = I915_READ(DPLL_CTRL1); in skl_ddi_clock_get()2309 val = I915_READ(DPLL_CTRL1); in intel_ddi_pre_enable()2316 I915_WRITE(DPLL_CTRL1, val); in intel_ddi_pre_enable()2317 POSTING_READ(DPLL_CTRL1); in intel_ddi_pre_enable()2600 val = I915_READ(DPLL_CTRL1); in skl_ddi_pll_enable()2606 I915_WRITE(DPLL_CTRL1, val); in skl_ddi_pll_enable()2607 POSTING_READ(DPLL_CTRL1); in skl_ddi_pll_enable()2651 val = I915_READ(DPLL_CTRL1); in skl_ddi_pll_get_hw_state()
5709 val = I915_READ(DPLL_CTRL1); in skl_dpll0_enable()5721 I915_WRITE(DPLL_CTRL1, val); in skl_dpll0_enable()5722 POSTING_READ(DPLL_CTRL1); in skl_dpll0_enable()6712 linkrate = (I915_READ(DPLL_CTRL1) & in skylake_get_display_clock_speed()9770 dpll_ctl1 = I915_READ(DPLL_CTRL1); in skylake_get_ddi_pll()
7415 #define DPLL_CTRL1 0x6C058 macro
1054 #define DPLL_CTRL1 0x864 macro