Searched refs:DPG_WATERMARK_MASK_CONTROL (Results 1 – 4 of 4) sorted by relevance
/linux-4.4.14/drivers/gpu/drm/radeon/ |
D | cikd.h | 870 #define DPG_WATERMARK_MASK_CONTROL 0x6cc8 macro
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D | cik.c | 9635 wm_mask = RREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset); in dce8_program_watermarks() 9639 WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, tmp); in dce8_program_watermarks() 9644 tmp = RREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset); in dce8_program_watermarks() 9647 WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, tmp); in dce8_program_watermarks() 9652 WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, wm_mask); in dce8_program_watermarks()
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/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
D | dce_v11_0.c | 1329 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 1); in dce_v11_0_program_watermarks() 1336 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2); in dce_v11_0_program_watermarks()
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D | dce_v10_0.c | 1341 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 1); in dce_v10_0_program_watermarks() 1348 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2); in dce_v10_0_program_watermarks()
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