Searched refs:DMA5_START_ADDR (Results 1 – 14 of 14) sorted by relevance
258 #define DMA5_START_ADDR 0xFFC00D44 /* DMA Channel 5 Start Address Register */ macro
280 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)281 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR,val)
292 #define DMA5_START_ADDR 0xFFC00D44 /* DMA Channel 5 Start Address Register */ macro
516 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)517 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR, val)
533 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)534 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR, val)
268 #define DMA5_START_ADDR 0xFFC00D44 /* DMA Channel 5 Start Address Register … macro
495 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)496 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR,val)
269 #define DMA5_START_ADDR 0xFFC00D44 /* DMA Channel 5 Start Address Register */ macro
618 #define bfin_read_DMA5_START_ADDR() bfin_readPTR(DMA5_START_ADDR)619 #define bfin_write_DMA5_START_ADDR(val) bfin_writePTR(DMA5_START_ADDR, val)
288 #define DMA5_START_ADDR 0xffc00d44 /* DMA Channel 5 Start Address Register */ macro
456 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)457 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR, val)
1626 #define DMA5_START_ADDR 0xFFC41284 /* DMA5 Start Address of Current Buffer */ macro
514 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)515 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR, val)