/linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/ |
H A D | dma.h | 11 #define IO_PROC_DMA_TX_DMA_NBR 4 /* IO processor DMA0 out. */ 12 #define IO_PROC_DMA_RX_DMA_NBR 5 /* IO processor DMA0 in. */
|
/linux-4.4.14/arch/cris/include/arch-v32/mach-fs/mach/ |
H A D | dma.h | 11 #define IO_PROC_DMA0_TX_DMA_NBR 2 /* IO processor DMA0 out. */ 12 #define IO_PROC_DMA0_RX_DMA_NBR 3 /* IO processor DMA0 in. */
|
/linux-4.4.14/arch/arm/mach-s3c64xx/include/mach/ |
H A D | dma.h | 16 /* DMA0/SDMA0 */
|
/linux-4.4.14/arch/blackfin/mach-bf538/include/mach/ |
H A D | defBF539.h | 61 #define MXVR_DMA0_CONFIG 0xFFC02798 /* MXVR Sync Data DMA0 Config Register */ 62 #define MXVR_DMA0_START_ADDR 0xFFC0279C /* MXVR Sync Data DMA0 Start Address Register */ 63 #define MXVR_DMA0_COUNT 0xFFC027A0 /* MXVR Sync Data DMA0 Loop Count Register */ 64 #define MXVR_DMA0_CURR_ADDR 0xFFC027A4 /* MXVR Sync Data DMA0 Current Address Register */ 65 #define MXVR_DMA0_CURR_COUNT 0xFFC027A8 /* MXVR Sync Data DMA0 Current Loop Count Register */
|
/linux-4.4.14/arch/sh/drivers/pci/ |
H A D | pci-sh4.h | 58 #define SH4_PCICLR_MDMA0 0x40000000 /* DMA0 Transfer Error */ 81 #define SH4_PCIDPA0 0x180 /* DMA0 Transfer Addr. */ 82 #define SH4_PCIDLA0 0x184 /* DMA0 Local Addr. */ 83 #define SH4_PCIDTC0 0x188 /* DMA0 Transfer Cnt. */ 84 #define SH4_PCIDCR0 0x18C /* DMA0 Control Register */
|
/linux-4.4.14/arch/blackfin/mach-bf548/include/mach/ |
H A D | defBF549.h | 62 /* MXVR DMA0 Registers */ 64 #define MXVR_DMA0_CONFIG 0xffc02798 /* MXVR Sync Data DMA0 Config Register */ 65 #define MXVR_DMA0_START_ADDR 0xffc0279c /* MXVR Sync Data DMA0 Start Address */ 66 #define MXVR_DMA0_COUNT 0xffc027a0 /* MXVR Sync Data DMA0 Loop Count Register */ 67 #define MXVR_DMA0_CURR_ADDR 0xffc027a4 /* MXVR Sync Data DMA0 Current Address */ 68 #define MXVR_DMA0_CURR_COUNT 0xffc027a8 /* MXVR Sync Data DMA0 Current Loop Count */
|
H A D | cdefBF549.h | 99 /* MXVR DMA0 Registers */
|
H A D | irq.h | 23 #define IRQ_SPORT0_RX BFIN_IRQ(9) /* SPORT0 RX Interrupt (DMA0) */
|
H A D | defBF542.h | 723 #define DMA0_INT 0x1 /* DMA0 pending interrupt */
|
H A D | defBF54x_base.h | 1525 #define DMA0 0x200 /* DMA Channel 0 */ macro 1969 #define DMA0OVR 0x800 /* DMA0 Memory Access Override */ 2007 #define DMA0URQ 0x100 /* DMA0 Urgent Request */
|
H A D | defBF547.h | 1000 #define DMA0_INT 0x1 /* DMA0 pending interrupt */
|
/linux-4.4.14/arch/blackfin/mach-bf533/include/mach/ |
H A D | irq.h | 22 #define IRQ_PPI BFIN_IRQ(8) /* DMA0 Interrupt (PPI) */
|
/linux-4.4.14/sound/oss/ |
H A D | waveartist.h | 23 #define DMA0 0x02 macro
|
H A D | trix.c | 203 * Check that DMA0 is not in use with a 8 bit board. init_trix_wss() 208 printk(KERN_ERR "AudioTrix: Can't use DMA0 with a 8 bit card slot\n"); init_trix_wss()
|
H A D | ad1848.c | 2575 * Check that DMA0 is not in use with a 8 bit board. probe_ms_sound() 2580 printk(KERN_ERR "MSS: Can't use DMA0 with a 8 bit card/slot\n"); probe_ms_sound()
|
H A D | waveartist.c | 872 if ((status & DMA0) && (devc->audio_mode & PCM_ENABLE_OUTPUT)) { waveartist_intr()
|
/linux-4.4.14/arch/m32r/include/asm/ |
H A D | m32102.h | 190 #define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* DMA0 */ 252 #define M32R_IRQ_DMA0 (32) /* DMA0 */ 267 #define M32R_IRQ_DMA0 (32) /* DMA0 */
|
/linux-4.4.14/kernel/ |
H A D | dma.c | 50 * DMA0 used to be reserved for DRAM refresh, but apparently not any more...
|
/linux-4.4.14/arch/powerpc/include/asm/ |
H A D | tsi108_irq.h | 64 #define IRQ_TSI108_DMA0 TSI108_IRQ(8) /* DMA0 */
|
/linux-4.4.14/arch/mips/loongson32/common/ |
H A D | irq.c | 127 /* set DMA0, DMA1 and DMA2 to edge trigger */ ls1x_irq_init()
|
/linux-4.4.14/arch/mips/txx9/rbtx4938/ |
H A D | irq.c | 33 * TXX9_IRQ_BASE+10 TX4938 DMA0
|
/linux-4.4.14/arch/frv/kernel/ |
H A D | irq.c | 129 __set_IITMR(0, 0x003f0000); /* DMA0-3, TIMER0-2 */ init_IRQ()
|
/linux-4.4.14/arch/arm/mach-s3c64xx/ |
H A D | pl080.c | 32 * DMA0
|
/linux-4.4.14/arch/blackfin/mach-bf537/include/mach/ |
H A D | irq.h | 18 #define IRQ_PPI BFIN_IRQ(4) /* DMA0 Interrupt (PPI) */
|
/linux-4.4.14/arch/arm/mach-nomadik/ |
H A D | cpu-8815.c | 47 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */
|
/linux-4.4.14/drivers/irqchip/ |
H A D | irq-s3c24xx.c | 654 { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ 723 { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ 861 { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA0 */ 928 { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ 1003 { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ 1113 { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA0 */
|
/linux-4.4.14/drivers/video/fbdev/ |
H A D | pxa168fb.h | 483 * DMA0 bit[23:20] 500 * DMA0 bit[19:16]
|
/linux-4.4.14/sound/isa/ |
H A D | cmi8328.c | 91 * bits 5-6: SB DMA: 00=disabled (when SB disabled), 01=DMA0, 10=DMA1, 11=DMA3 108 * bits 3-4: CD-ROM DMA: 00=disabled, 01=DMA0, 10=DMA1, 11=DMA3
|
/linux-4.4.14/drivers/net/wireless/ath/wcn36xx/ |
H A D | dxe.h | 23 TX_LOW = DMA0
|
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/ |
H A D | mdp5_kms.h | 127 NAME(DMA0), NAME(DMA1), pipe2name()
|
/linux-4.4.14/drivers/dma/ppc4xx/ |
H A D | adma.c | 92 /* Pointer to DMA0, DMA1 CP/CS FIFO */ 95 /* Pointers to last submitted to DMA0, DMA1 CDBs */ 327 * with DMA0/1 1085 * ppc440spe_dma_put_desc - put DMA0,1 descriptor to FIFO. 1357 * (2) or on DMA0/1. ppc440spe_adma_estimate() 1359 * else let it be processed on one of the DMA0/1 engines. ppc440spe_adma_estimate() 1361 * source process it on DMA0/1 only. ppc440spe_adma_estimate() 1366 ef = 0; /* sum_product case, process on DMA0/1 */ ppc440spe_adma_estimate() 1368 ef = 3; /* override (DMA0/1 + idle) */ ppc440spe_adma_estimate() 2411 * doesn't work for RXOR with DMA0/1! Instead, multi=0 ppc440spe_dma01_prep_pq() 3125 /* DMA0,1 may do: WXOR, RXOR, RXOR+WXORs chain ppc440spe_adma_pq_set_src() 4043 /* it is DMA0 or DMA1 */ ppc440spe_adma_probe() 4052 /* DMA0,1 engines use FIFO to maintain CDBs, so we ppc440spe_adma_probe() 4165 * async_mult/async_sum_product operations on DMA0/1. ppc440spe_adma_probe() 4472 /* Provide memory regions for DMA's FIFOs: I2O, DMA0 and DMA1 share ppc440spe_configure_raid_devices()
|
/linux-4.4.14/drivers/media/platform/ |
H A D | arv.c | 236 ar_outl(0x8000, M32R_DMAEN_PORTL); /* disable DMA0 */ disable_dma() 241 ar_outl(0x8080, M32R_DMAEN_PORTL); /* enable DMA0 */ enable_dma()
|
/linux-4.4.14/arch/x86/include/asm/ |
H A D | dma.h | 255 /* Set transfer size (max 64k for DMA0..3, 128k for DMA5..7) for
|
/linux-4.4.14/arch/blackfin/mach-bf609/include/mach/ |
H A D | irq.h | 59 #define IRQ_SPORT0_TX BFIN_IRQ(43) /* SPORT0 TX Interrupt (DMA0) */
|
H A D | defBF60x_base.h | 1518 DMA0 1520 #define DMA0_NEXT_DESC_PTR 0xFFC41000 /* DMA0 Pointer to Next Initial Descriptor */ 1521 #define DMA0_START_ADDR 0xFFC41004 /* DMA0 Start Address of Current Buffer */ 1522 #define DMA0_CONFIG 0xFFC41008 /* DMA0 Configuration Register */ 1523 #define DMA0_X_COUNT 0xFFC4100C /* DMA0 Inner Loop Count Start Value */ 1524 #define DMA0_X_MODIFY 0xFFC41010 /* DMA0 Inner Loop Address Increment */ 1525 #define DMA0_Y_COUNT 0xFFC41014 /* DMA0 Outer Loop Count Start Value (2D only) */ 1526 #define DMA0_Y_MODIFY 0xFFC41018 /* DMA0 Outer Loop Address Increment (2D only) */ 1527 #define DMA0_CURR_DESC_PTR 0xFFC41024 /* DMA0 Current Descriptor Pointer */ 1528 #define DMA0_PREV_DESC_PTR 0xFFC41028 /* DMA0 Previous Initial Descriptor Pointer */ 1529 #define DMA0_CURR_ADDR 0xFFC4102C /* DMA0 Current Address */ 1530 #define DMA0_IRQ_STATUS 0xFFC41030 /* DMA0 Status Register */ 1531 #define DMA0_CURR_X_COUNT 0xFFC41034 /* DMA0 Current Count(1D) or intra-row XCNT (2D) */ 1532 #define DMA0_CURR_Y_COUNT 0xFFC41038 /* DMA0 Current Row Count (2D only) */ 1533 #define DMA0_BWL_COUNT 0xFFC41040 /* DMA0 Bandwidth Limit Count */ 1534 #define DMA0_CURR_BWL_COUNT 0xFFC41044 /* DMA0 Bandwidth Limit Count Current */ 1535 #define DMA0_BWM_COUNT 0xFFC41048 /* DMA0 Bandwidth Monitor Count */ 1536 #define DMA0_CURR_BWM_COUNT 0xFFC4104C /* DMA0 Bandwidth Monitor Count Current */
|
/linux-4.4.14/arch/mips/include/asm/ |
H A D | dma.h | 261 /* Set transfer size (max 64k for DMA0..3, 128k for DMA5..7) for
|
/linux-4.4.14/drivers/ide/ |
H A D | sis5513.c | 140 for PIO0/1/2/3/4 and DMA0/1/2 mode in order */
|
/linux-4.4.14/drivers/staging/vt6655/ |
H A D | mac.c | 367 /* Clear RX DMA0,1 */ MACbSafeRxOff()
|
/linux-4.4.14/drivers/staging/comedi/drivers/ |
H A D | adl_pci9118.c | 825 "WAR: DMA0 buf too short, can't support CMDF_WAKE_EOS (%d<%d)\n", pci9118_ai_setup_dma() 832 "ERR: DMA0 buf len bug? (%d<4)\n", pci9118_ai_setup_dma()
|
H A D | rtd520.c | 194 #define LAS0_DMA0_RESET 0x01cc /* DMA0 Request state machine reset */ 374 #define DMA0_ACTIVE 0x02 /* DMA0 is active */
|
H A D | das1800.c | 41 [2] - DMA0 (optional, requires irq)
|
/linux-4.4.14/sound/pci/ice1712/ |
H A D | ice1724.c | 468 * Playback DMA0 (M/C) = playback_pro_substream snd_vt1724_interrupt() 473 * Record DMA0 = capture_pro_substream snd_vt1724_interrupt()
|
/linux-4.4.14/arch/blackfin/mach-bf527/include/mach/ |
H A D | defBF525.h | 631 #define DMA0_INT 0x1 /* DMA0 pending interrupt */
|
H A D | defBF522.h | 1277 #define DMA0OVR 0x800 /* DMA0 Memory Access Override */
|
/linux-4.4.14/drivers/usb/musb/ |
H A D | cppi_dma.c | 31 * and RX DMA0: 4 left, 80000000 8feff880, 8feff860 8feff860; 8f321401
|
/linux-4.4.14/drivers/scsi/ |
H A D | eata.c | 678 drqx : 2; /* DRQ Index (0=DMA0, 1=DMA7, 2=DMA6, 3=DMA5) */
|
/linux-4.4.14/drivers/pinctrl/sh-pfc/ |
H A D | pfc-r8a7740.c | 554 /* DMA0 */
|
/linux-4.4.14/arch/blackfin/mach-bf518/include/mach/ |
H A D | defBF512.h | 1272 #define DMA0OVR 0x800 /* DMA0 Memory Access Override */
|
/linux-4.4.14/drivers/gpu/drm/radeon/ |
H A D | si.c | 4925 block = "DMA0"; si_vm_decode_fault() 5042 block = "DMA0"; si_vm_decode_fault()
|