Searched refs:DI_EN (Results 1 – 9 of 9) sorted by relevance
35 #define DI_EN DI_EN_X /* Data Interrupt Enable */ macro64 #define DI_EN 0x0080 /* Data Interrupt Enable */ macro
72 set_dma_config(sport->tx_dma_chan, DMAFLOW_LIST | DI_EN in sport_tx_start()83 set_dma_config(sport->rx_dma_chan, DMAFLOW_LIST | DI_EN | WNR in sport_rx_start()166 cfg = DMAFLOW_LIST | DI_EN | compute_wdsize(sport->wdsize) | NDSIZE_6; in sport_config_tx_dma()197 cfg = DMAFLOW_LIST | DI_EN | compute_wdsize(sport->wdsize) in sport_config_rx_dma()
445 cfg = 0x7000 | DI_EN | compute_wdsize(sport->wdsize) | WNR | \ in sport_config_rx_dma()509 cfg = 0x7000 | DI_EN | compute_wdsize(sport->wdsize) | \ in sport_config_tx_dma()1036 dma_config = (RESTART | WDSIZE_16 | DI_EN); in sport_send_and_recv()1047 dma_config = (RESTART | WDSIZE_16 | WNR | DI_EN); in sport_send_and_recv()
509 val = DI_EN | WDSIZE_16; in bf5xx_nand_dma_rw()515 val = DI_EN | WDSIZE_32; in bf5xx_nand_dma_rw()
186 host->sg_cpu[host->dma_len - 1].cfg |= DI_EN; in sdh_setup_data()
709 (DMAFLOW_AUTO | RESTART | dma_width | DI_EN); in bfin_spi_pump_transfers()727 dma_config = (RESTART | dma_width | DI_EN); in bfin_spi_pump_transfers()
516 dma_config |= DMAFLOW_STOP | RESTART | DI_EN; in adi_spi_dma_xfer()
272 crc->sg_cpu[i - 1].cfg |= DI_EN; in bfin_crypto_crc_config_dma()
224 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN | in desc_list_init()